LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 115

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Register: 0xFE01
Watchdog Secondary Chain (WDSC)
Read Only
The values in this register are not affected by a soft reset.
R
WDSC[6:0]
Register: 0xFE02
Watchdog Final Chain (WDFC)
Read Only
The values in this register are not affected by a soft reset.
R
WDFC[3:0]
R
7
x
7
x
6
0
x
Reserved
Watchdog Secondary Chain
These register bits provide the ability to read the 7-bit
value in the secondary watchdog timer divider chain. With
a 40 MHz external clock, this divider chain is clocked at
10 kHz (100 s per count).
Reserved
Watchdog Final Chain
These register bits provide the ability to read the 4-bit
value in the final watchdog timer divider chain. With a
40 MHz external clock, this divider chain is clocked at
100 Hz (10 ms per count). The value in this register is
compared to the 4-bit value in bits 0 through 3 of the
Watchdog Timer Control (WDTC)
the time-out value of the watchdog timer.
R
0
x
0
4
x
Defaults:
WDSC[6:0]
0
3
0
0
0
register to determine
WDFC[3:0]
0
0
0
0
0
0
[6:0]
[7:4]
[3:0]
7-5
7