LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 103

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Register: 0xFD00/0xFD02
Own Address (ES0, ES1, ES2 = 000)
Read/Write
R
A[6:0]
Register: 0xFD00/0xFD02
Clock (ES0, ES1, ES2 = 010)
Read/Write
R
ICF
ASF
R
7
1
7
0
R
6
0
0
Reserved
Own Address
This register contains the address that is used for slave
mode operation. If the first byte of transmission matches
this bit pattern, then the AAS bit in the Two-Wire Serial
interface 0 Control/Status register (0xFD01/0xFD03) will
be made active. Note that the data in this register is
shifted by one bit for comparisons, as the read/write bit is
transmitted along with the slave address. This register
should be programmed even if slave mode is not
supported by the firmware. If this register is not
programmed to a value other than zero, then the interface
will be in a monitor state and will only provide bus status.
Reserved
Intermediate Clock Frequency
Active SCL Frequency
This register contains a value used to control the Two-
Wire Serial bus clock frequency based upon the following
tables and equation:
IIC _Frequency SLC
1
5
0
0
4
0
ICF[2:0]
A[6:0]
=
1
0
--------------------------
D0 D1
f
clk
0
2
0
1
1
0
ASF[1:0]
0
0
0
0
[6:0]
[7:5]
[4:2]
[1:0]
6-3
7