LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 73

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 3.9
Name
DSK_WR/,
SEL_6
PARALLEL_
ESI/
PA0
PA1
PA2
PA3
PA4
PA5
PA6
tied to V
tied to V
tied to V
DD
DD
DD
Pin Assignments for SFF-8067 Mode (Cont.)
113/D3
126/B10
125/C10
124/A11
119/D10
118/C12
117/D11
116/C13
114/D12
Pin/Ball
130/B9
129/C9
127/D9
No.
SFF-8067 Mode
Description
When PARALLEL_ESI/ is asserted,
this is an active low control signal
sourced by the drive to the
LSI53C040 to indicate the device is
ready to write data. When
PARALLEL_ESI/ is deasserted, this
signal is the SEL_6 signal, included
for compatibility with SFF-8045.
Used to select between the SEL_ID
and the bidirectional interface. Pull-
up resistors on the interface are
3.3 k
asserted, the drive begins the
discovery process and prepares to
read or write data. When this pin is
deasserted, the drive is presented
with SEL_ID. All SFF-8067
transactions are terminated,
regardless of the state of the
protocol.
This pin contains bit 0 of the
physical address of the enclosure.
This pin contains bit 1 of the
physical address of the enclosure.
This pin contains bit 2 of the
physical address of the enclosure.
This pin contains bit 3 of the
physical address of the enclosure.
This pin contains bit 4 of the
physical address of the enclosure.
This pin contains bit 5 of the
physical address of the enclosure.
This pin contains bit 6 of the
physical address of the enclosure.
minimum. When this pin is
–
–
–
8067 Port
Port 1
Port 1
Port 0
Port 0
Port 0
Port 0
Port 0
Port 0
Port 0
N/A
N/A
N/A
Pad
Configuration
4 mA open drain
bidirectional
4 mA open drain
bidirectional
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
3-21