TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 115

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TXC-06312BIOG

Manufacturer Part Number
TXC-06312BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06312BIOG

Lead Free Status / Rohs Status
Supplier Unconfirmed
1 1 5 o f 2 02
11.6 HIGH ORDER PATH OVERHEAD PROCESSING
11.6.1 High Order Path Overhead Generator
FIFO filling level is in one of these zones, as much pointer justifications as allowed will be
generated to adjust the filling level towards the dead zone, resulting in one justification
generated every four SDH/SONET frames.
The remaining zones are the Slow Leak Zone and the Fast Leak Zone. Each of these zones
is also 4 words wide. These are the zones that allow smoothing out jitter on the AU-3/AU-4/
AU-4-Xc/STS-1/STS-3c/STS-6c/STS-9c/STS-12c pointer values. The mechanism used to
obtain this uses a Justification Spacing counter per timeslot. This counter maintains a fixed
distance between two consecutive Pointer Justifications and is used as long as the FIFO
filling level is situated inside the Slow or Fast leak zones. The initial value for these
countdown counters is set to the value provided by SlowLeakRegister or FastLeakRegister,
according to the current zone.
Efficient smoothing out of the jitter can be obtained by providing accurate values for
SlowLeakRegister and FastLeakRegister.
The PHAST-12N device is compliant to the latest ITU/ETSI/ANSI standards and features
regarding the generation and monitoring of the high order Path Overhead bytes.
The PHAST-12N generates the high order path overhead bytes of all sourced VC-3/VC-4/VC-
4-Xc/STS-1/STS-3c/STS-6c/STS-9c/STS-12c channels.
• A single, 16 or 64 byte Trail Trace Identifier stored in the transmit POH RAM will be
• BIP-8 will be calculated over all bits of the preceding VC-n frame and will be inserted in
• The TSL signal label stored in the transmit POH RAM will be inserted in the C2 byte
• Per high order path the REI can be sourced from
• The REI will be inserted into the G1 byte
• Per high order path the RDI can be sourced from
inserted in the J1 byte. Note that in case of a single or 16 byte Trail Trace Identifier the
message must be repeated respectively 64 or 4 times.
the B3 byte of the current frame. The B3 byte in the transmit POH RAM is used as an
errormask to corrupt the calculated B3 byte.
• The transmit POH RAM
• The transmit POH byte interface
• The internal or external ring port
• The transmit POH RAM
• The transmit POH byte interface
• The internal or external ring port
- High Order Pointer Tracking, Retiming and Pointer Generation -
PRELIMINARY TXC-06312B-MB, Ed. 2
PHAST-12N Device
DATA SHEET
TXC-06312B
June 2005

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