TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 24

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
LINERXSIGDET1
LINERXSIGDET2
LINERXSIGDET3
LINERXSIGDET4
LINERXCLK1
LINERXCLK2
LINERXCLK3
LINERXCLK4
LINERXCAP
Symbol
Lead No. I/O/P
AA18
AB20
AA19
AB21
W17
W18
Y18
Y19
Y17
O
O
O
O
I
I
I
I
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Analog Capacitor for the Receive Line & APS Clock Recovery:
LVTTL Signal Detect #1: Signal from the optical receiver for line #1
LVTTL Signal Detect #2: Signal from the optical receiver for line #2
LVTTL Signal Detect #3: Signal from the optical receiver for line #3
LVTTL Signal Detect #4: Signal from the optical receiver for line #4
Type
8mA
8mA
8mA
8mA
-
Lead Descriptions
indicating signal presence.
indicating signal presence. Not used in STM-4/OC-12 mode.
indicating signal presence. Not used in STM-4/OC-12 mode.
indicating signal presence. Not used in STM-4/OC-12 mode.
Receive Divided Clock #1: Clock output derived from the
clock recovered from the serial data stream on
LINERXDATA1P/N.
The clock rate is programmable to be either 19.44 or 77.76
MHz.
Receive Divided Clock #2: Clock output derived from the
clock recovered from the serial data stream on
LINERXDATA2P/N.
The clock rate is fixed to 19.44 MHz.
Receive Divided Clock #3: Clock output derived from the
clock recovered from the serial data stream on
LINERXDATA3P/N.
The clock rate is fixed to 19.44 MHz.
Receive Divided Clock #4: Clock output derived from the
clock recovered from the serial data stream on
LINERXDATA4P/N.
The clock rate is fixed to 19.44 MHz.
Optional external capacitor. Do not install.
-
Name/Function
2 4 o f 2 0 2