TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 42

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
MPD15
MPD14
MPD13
MPD12
MPD11
MPD10
MPD09
MPD08
MPD07
MPD06
MPD05
MPD04
MPD03
MPD02
MPD01
MPD00
MPSEL
MPTS
MPWR
MPACK
MPINTR
Symbol
Lead No.
G3
H4
G2
H3
G1
H2
H1
F1
K4
K3
K2
L4
K1
L3
L2
L1
B3
J4
J3
J2
J1
I/O(T)
I/O/P
O(T) LVCMOS
O
I
I
I
LVCMOS
LVCMOS
LVTTL/
LVTTL PHAST-12N Chip Select (Active Low): This active low lead
LVTTL Not Applicable Input: This lead must be tied to VSS.
LVTTL Local Bus Read/Write (Active Low): This active low lead indi-
24mA
Type
8mA
8mA
-
Lead Descriptions
Local Data Bus: These leads are the bidirectional data bus
used for transferring data between the PHAST-12N and the host
processor.
MPD15 is the most significant bit.
Motorola MPC8260 Notation: LCL_D[ ]
enables data transfers between the host processor and the
PHAST-12N through a read or write cycle.
Motorola MPC8260 notation: CS
cates that the actual transfer between the host processor and
the PHAST-12N is a write transfer.
Motorola MPC8260 notation: LWR
Local Bus GPCM Transfer Acknowledge (Active Low): This
lead is used to acknowledge a host processor access. It is syn-
chronous to the MPCLK. To acknowledge an access, MPACK is
asserted during 1 MPCLK cycle and then de-asserted during 3
MPCLK cycles before going in tristate.
For a write access, an acknowledge indicates that data is written
to the addressed memory location. For a read access, an
acknowledge indicates that the data to be read from the
addressed memory location is available on the data bus.
Motorola MPC8260 notation: LGTA
Interrupt: This lead signals an interrupt request to the host pro-
cessor. Active level depends on MPINTLEVEL.
Note: MPC8260 Local Bus expects active low interrupt, requiring
MPINTLEVEL to be low.
-
Name/Function
4 2 o f 2 0 2