STV3550B STMicroelectronics, STV3550B Datasheet - Page 105
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STV3550B
Manufacturer Part Number
STV3550B
Description
Manufacturer
STMicroelectronics
Datasheet
1.STV3550B.pdf
(145 pages)
Specifications of STV3550B
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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STV3550
7.7.8
Figure 69. Clock edge detection (rising edge)
Receive data sampling
The data received by the SSC2 is sampled after the latching edge of the input clock. The
latching edge being determined by the programming of the polarity and phase bits.
The data value which is finally latched is determined by taking three data samples at the
3rd, 4th and 5th system clock periods after the latching data edge. The data value is
determined from the predominant data value in the three samples. This therefore gives an
element of spike suppression.
The sampling process is shown in
Figure 70. Receive data sampling
System Clock
Serial_Clock_In
Sampling
Points
Latched Data
Value
System Clock
Serial_Clock_In
Sampling
Points
Figure
First 3 samples
Majority 0
70.
1
2
1
3
Last 3 samples
Majority 1
2
4
3
TV chassis control
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