STV3550B STMicroelectronics, STV3550B Datasheet - Page 117

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STV3550B

Manufacturer Part Number
STV3550B
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STV3550B

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant

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STV3550
7.7.25
I²C timing specification
The I²C specification defines a number of timing constraints which must be met on the
output clock and data pins. The key values which must be met are described in
Table 27.
1. In FAST Mode
2. Actual requirement is 0ns but hold time must be at least 300ns on SDA line to comply with uncertain period
3. In FAST mode, but when used with normal mode devices must still meet the 250ns minimum
4. Where C
In order to meet these various timing requirements of the I²C standard a number of counters
are included in the design. These are programmed to take a number of constants which will
provide the times required.
The constants are defined for a particular system clock frequency to be sufficient to meet
the minimum timing requirements (there are no maximum times defined for these timings). If
the system clock frequency is higher or very much slower than the one used to define the
constants then the values need to be re-defined.
The constants used for the current implementation are shown in
Table 28.
SCL Clock Frequency
Hold Time of SCL after SDA START or REPSTART
Condition.
After this time the first clock low pulse is created
LOW Period of the SCL clock
HIGH period of the SCL clock
SDA Set-up time relative to SCL for a repeated
START condition
SDA Data Hold Time relative to SCL
SDA Data Setup Time relative to SCL
Rise time of SDA and SCL lines
Fall time of SDA and SCL lines
SDA Setup time relative to SCL for a STOP condition 4.0us or 0.6us
Capacitive load of each bus line (C
Data Hold Time
Setup Time For STOP
Condition T
Setup Time For START
(repeated) Condition T
of max fall time of 300ns on the SCL line.
I²C timing name
b
SU.STO
is the total capacitance on one bus line in pF
Key I
I
2
C timing constants
2
C timing requirements
Parameter
SU.ST
300ns
4.0us
4.7us
I²C standard minimum
b
)
time
1.0us or 0.6us
4.7us or 1.3us
4.0us or 0.6us
4.6us or 0.6us
300ns
250ns or 100ns
20+0.1C
20+0.1C
21
300
300
Constant value
(2)
b
b
MIN
(4)
(3)
(cycles)
(1)
(2)
(1)
(1)
(1)
(3)
Table
28.
100KHZ or 400KHz
100ns or 300ns
300ns
400pF
TV chassis control
350ns
5.0us
5.0us
Time produced At
60 MHz
MAX
Table
117/145
(1)
27.
(1)

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