STV3550B STMicroelectronics, STV3550B Datasheet - Page 118

• Manufacturer Part Number: STV3550B
• Manufacturer: STMicroelectronics

Specifications of STV3550B

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

TV chassis control
7.8
7.8.1
Note:
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Asynchronous serial controller (ASC)
Table 28.
The ASC, also referred to as the UART interface, provides serial communication between
the STV3550 and other microcontrollers, microprocessors or external peripherals.
Eight or nine bit data transfer, parity generation, and the number of stop bits are
programmable. Parity, framing, and overrun error detection is provided to increase the
reliability of data transfers. Transmission and reception of data can simply be double-
buffered, or 16-deep FIFOs may be used. Handshaking is supported on both transmission
and reception. For multiprocessor communication, a mechanism to distinguish the address
from the data bytes is included. Testing is supported by a loop-back option. A dual mode 16-
bit baud rate generator provides the ASC with a separate serial clock signal.
The ASC supports full-duplex asynchronous communication, where both the transmitter and
the receiver use the same data frame format and the same baud rate. Data is transmitted on
the transmit data output pin TxD and received on the receive data input pin RxD.
The registers for the ASC are grouped in a 4 Kbyte block, with the base of the block for ASC
number n at the address ASCnBaseAddress. The value of each ASCnBaseAddress is given
in the register information at the back of this chapter.
Control
The ASC_n_control register controls the operating mode of the ASC. It contains control and
enable bits, error check selection bits, and status flags for error identification.
Serial data transmission or reception is only possible when the baud rate generator run bit
(Run) is set to 1. When the Run bit is set to 0, TxD will be 1. Setting the Run bit to 0 will
immediately freeze the state of the transmitter and receiver and should only be done when
the ASC is idle.
Programming the mode control field (Mode) to one of the reserved combinations may result
in unpredictable behavior.
The ASC can be set to use either double-buffering or a 16-deep FIFO on transmission and
reception.
Resetting the FIFOs
The ‘registers’ ASC_n_TxReset and ASC_n_RxReset have no actual storage associated
with them. A write of any value to one of these registers resets the corresponding FIFO.
Transmission and reception
Serial data transmission or reception is only possible when the baud rate generator run bit
(Run) is set to 1. A handshaking protocol is supported on both transmission and reception,
using CTS and RTS signals.
Hold Time (repeated) START
Condition T
Data Setup Time T
I²C timing name
HD:STA
I
2
C timing constants (continued)
SU:DAT
4.0us
250ns
I²C standard minimum
time
300
21
Constant value
(cycles)
5.0us
300ns
Time produced At
60 MHz
STV3550