EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 165
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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- EP4SGX110DF29C3N PDF datasheet
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- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
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Chapter 5: Clock Networks and PLLs in Stratix IV Devices
PLLs in Stratix IV Devices
February 2011 Altera Corporation
Charge Pump and Loop Filter
You can reconfigure the charge-pump and loop-filter settings to update the PLL
bandwidth in real time.
Table 5–12
Stratix IV PLLs.
Table 5–12. Charge Pump Current Bit Settings
Table 5–13
PLLs.
Table 5–13. Loop-Filter Resistor Bit Settings
Table 5–14
PLLs.
Table 5–14. Loop-Filter Capacitor Bit Settings
LFR[4]
0
0
0
0
1
1
1
1
1
1
1
CP[2]
0
0
0
1
LFC[1]
lists the possible settings for charge pump current (Icp) values for
lists the possible settings for loop-filter resistor (R) values for Stratix IV
lists the possible settings for loop-filter capacitor (C) values for Stratix IV
0
0
1
LFR[3]
0
0
0
1
0
0
0
1
1
1
1
CP[1]
0
0
1
1
LFR[2]
0
0
1
0
0
0
1
0
0
1
1
LFC[0]
0
1
1
LFR[1]
0
1
0
0
0
1
0
0
1
0
1
CP[0]
0
1
1
1
LFR[0]
0
1
0
0
0
1
0
0
1
0
0
Decimal Value for Setting
Decimal Value for Setting
Stratix IV Device Handbook Volume 1
Decimal Value for Setting
0
1
3
0
3
7
1
16
19
20
24
27
28
30
0
3
4
8
5–49
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