EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 26
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H40I3
Manufacturer:
ALTERA
Quantity:
325
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
SHARP
Quantity:
1 200
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA
Quantity:
490
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
- Current page: 26 of 432
- Download datasheet (11Mb)
Table 1–1. Stratix IV GX Device Features (Part 2 of 2)
M9K Blocks
(256 ×
36 bits)
M144K
Blocks
(2048 ×
72 bits)
Total Memory
(MLAB+M9K
+M144K)
Kbits
Embedded
Multipliers
18 × 18
PLLs
User I/Os
Speed Grade
(fastest to
slowest)
(1) The total number of transceivers is divided equally between the left and right side of each device, except for the devices in the F780 package. These devices have eight transceiver channels located only
(2) Four multiplier adder mode.
(3) The user I/Os count from pin-out files includes all general purpose I/O, dedicated clock pins, and dual purpose configuration pins. Transceiver pins and dedicated configuration pins are not included in
(4) Total pairs of high-speed LVDS SERDES take the lowest channel count of R
(5) The difference between the Stratix IV GX devices in the –2 and –2× speed grades is the number of available transceiver channels. The –2 device allows you to use the transceiver CMU blocks as transceiver
Notes to
Package
Feature
Option
on the right side of the device.
the pin count.
channels. The –2× device does NOT allow you to use the CMU blocks as transceiver channels. In addition to the reduction of available transceiver channels in the Stratix IV GX –2x device, the data rates
in the –2× device are limited to 6.5 Gbps.
(2)
Table
(5)
(3)
1–1:
–2× ,
EP4SGX70
372
–3,
–4
3
7,370
462
384
16
488
–2,
–3,
–4
4
–2×
372
–3,
–4
3
,
EP4SGX110
9,564
660
512
–2×
372
16
–3,
–4
,
4
–2,
–3,
48
–4
8
372
–2×
–3,
–4
3
,
EP4SGX180
–3,
13,627
56
–2
× ,
–4
4
950
920
20
6
56
–2
–3
–4
4
,
,
–2,
–3,
74
–4
8
4
–2×
372 564
–3,
–4
3
,
X
/T
EP4SGX230
X
.
–2×
–3,
–4
17,133
1,235
1,288
,
22
6
–2,
–3,
56
–4
4
–2,
–3,
74
–4
8
4
289
–2×
–3,
–4
4
,
564
–2×
–3,
–4
,
EP4SGX290
6
17,248
–2,
–3,
56
–4
4
936
832
36
–2,
–3,
74
–4
8
4
–2,
–3,
12
88
–4
0
–2,
–3,
12
92
–4
0
289
–2×
–3,
–4
4
,
564
–2×
–3,
–4
,
6
1,040
EP4SGX360
–2,
–3,
56
–4
22,564
4
1,248
48
–2,
–3,
74
–4
8
4
–2,
–3,
12
88
–4
0
1,02
920
–2,
–3,
12
–4
4
564
–2,
–3,
–4
6
EP4SGX530
744 880 920
–2,
–3,
–4
8
27,376
1,280
1,024
64
–2,
–3,
12
–4
–2,
–3,
12
–4
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