XCS10XL-5TQ144C Xilinx Inc, XCS10XL-5TQ144C Datasheet - Page 33

• Manufacturer Part Number: XCS10XL-5TQ144C
• Description: IC FPGA 3.3V C-TEMP 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-XLr

Specifications of XCS10XL-5TQ144C

• Number Of Logic Elements/cells: 466
• Number Of Labs/clbs: 196
• Total Ram Bits: 6272
• Number Of I /o: 112
• Number Of Gates: 10000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Case: TQFP144
• Dc: 02+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 17: Spartan/XL Program Data
Notes:
1.
2.
3.
4.
During Readback, 11 bits of the 16-bit checksum are added
to the end of the Readback data stream. The checksum is
computed using the CRC-16 CCITT polynomial, as shown
in
cant bits of the 16-bit code. A change in the checksum indi-
cates a change in the Readback bitstream. A comparison to
a previous checksum is meaningful only if the readback
DS060 (v1.8) June 26, 2008
Product Specification
Max System
Gates
CLBs
(Row x Col.)
IOBs
Part Number
Supply Voltage
Bits per Frame
Frames
Program Data
PROM Size
(bits)
Express Mode
PROM Size
(bits)
Figure
Bits per Frame = (10 x number of rows) + 7 for the top + 13 for the bottom + 1 + 1 start bit + 4 error check bits (+1 for Spartan-XL
device)
Number of Frames = (36 x number of columns) + 26 for the left edge + 41 for the right edge + 1 (+ 1 for Spartan-XL device)
Program Data = (Bits per Frame x Number of Frames) + 8 postamble bits
PROM Size = Program Data + 40 (header) + 8, rounded up to the nearest byte
The user can add more "1" bits as leading dummy bits in the header, or, if CRC = off, as trailing dummy bits at the end of any frame,
following the four error check bits. However, the Length Count value must be adjusted for all such extra "one" bits, even for extra
leading ones at the beginning of the header.
Express mode adds 57 (XCS05XL, XCS10XL), or 53 (XCS20XL, XCS30XL, XCS40XL) bits per frame, + additional start-up bits.
XCS40XL provided 224 max I/O in CS280 package discontinued by PDN2004-01.
Device
29. The checksum consists of the 11 most signifi-
R
XCS05 XCS05XL XCS10 XCS10XL XCS20 XCS20XL XCS30 XCS30XL XCS40 XCS40XL
53,936
53,984
126
428
5V
-
(10 x 10)
XCS05
5,000
100
80
54,491
54,544
79,072
3.3V
127
429
94,960
95,008
166
572
5V
-
(14 x 14)
XCS10
10,000
196
112
128,488
95,699
95,752
3.3V
167
573
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178,096 179,111 247,920 249,119 329,264 330,647
178,144 179,160 247,968 249,168 329,312 330,696
226
788
5V
data is independent of the current device state. CLB outputs
should not be included (Readback Capture option not
used), and if RAM is present, the RAM content must be
unchanged.
Statistically, one error out of 2048 might go undetected.
-
(20 x 20)
XCS20
20,000
Spartan and Spartan-XL FPGA Families Data Sheet
400
160
221,056
3.3V
227
789
266
932
5V
-
(24 x 24)
XCS30
30,000
576
192
298,696
3.3V
267
933
1,076
306
5V
-
(28 x 28)
XCS40
40,000
205
784
(4)
387,856
1,077
3.3V
307
33