PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 210
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
2.2.3 Boot Control/State Machine
2.3 The Boot Command Language
specification. Depending on the state of the BOOT_MODE[2] pin the operating speed
of the I
derives the 100 KHz or 400 KHz clock from 27 MHz input clock.
The I
formats.
The boot control/state machine is in fact a mini processor. It fetches commands from
the boot scripts or the content of the EEPROM, decodes the command and
processes the address or the data depending on the command as documented
Section
and can later on be used by the I
The boot script consists of a sequence of 32-bit commands. These commands
constitute the language understood by the boot module. The valid commands are:
•
•
•
•
A write to a given 32-bit value at a given address (useful for writing device control
registers).
A write to an arbitrary length list of 32-bit values starting at a given address
(useful for filling memory with a processor binary image).
A delay by a given number of 27 MHz clock ticks (useful to wait for completion of
an action, such as a PLL frequency change, or a device DMA operation).
Terminate Boot.
2
C interface can handle EEPROMs with both 1-byte and 2-byte addressing
2
C interface is 400 KHz, if set to ‘1’, or 100 KHz, if set to ‘0’. The I
2.3. When an end of boot command is reached, the I
Rev. 1 — 17 March 2006
2
C module.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 6: Boot Module
2
C interface is released
2
C master
6-5
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