PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 50

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
Table 11: PNX1701 Maximum Operating Speeds
[1]
Table 12: PNX1702 Operating Range and Thermal Characteristics
Table 13: PNX1702 Maximum Operating Speeds
[1]
5. Power Considerations
PNX17XX_SER_1
Preliminary data sheet
VLIW
CPU
TM5250
(MHz)
450
Symbol Description
V
V
V
V
T
T
VLIW
CPU
TM5250
(MHz)
500
case
J
JA
JC
JB
CCP
CCM
REF
DD
[1]
[1]
Table 3 on page 5-9
Table 3 on page 5-9
Global I/O supply voltage
DDR-I I/O supply voltage.
Input reference level voltage for the DDR I/Os.
SoC Core supply voltage
Operating case temperature range
Operating junction temperature
Top of junction to ambient thermal resistance (still air)
Top of junction to ambient thermal resistance (air flow 1.0 m/s)
Top of junction to ambient thermal resistance (air flow 2.5 m/s)
Top of junction to case thermal resistance (same as
Top of junction to board thermal resistance
DDR-I
(MHz)
200
DDR-I
(MHz)
200
[1]
[1]
MMIO
(MHz)
157
MMIO
(MHz)
157
4.3 PNX1702 Device
5.1 Power Supply Sequencing
2DDE
MBS
VLD
(MHz)
144
2DDE
MBS
VLD
(MHz)
144
No special power sequence is required to operate the PNX17xx Series. However, in
order to guarantee that MM_CKE remains low at power up, the PNX1700 is required
to have the SoC core voltage, i.e. VDD, to come-up before the VCCM, i.e. DDR-I
power supply. This is a JEDEC DDR specification requirement.
Remark: DDR SDRAM devices power supply sequence must also be met. Refer to
the DDR SDRAM vendor specification.
QVCP
(qvcp_out,
qvcp_proc,
Dual Edge)
(MHz)
108, 133, 81
QVCP
(qvcp_out,
qvcp_proc,
Dual Edge)
(MHz)
148, 157, 81
Rev. 1 — 17 March 2006
VIP
(MHz)
81
VIP
(MHz)
81
V
CCM
/2 +/- 100 mV
FGPO
FGPI
(MHz)
100
FGPO
FGPI
(MHz)
108
JT
)
DVDD
(MHz)
78
DVDD
(MHz)
78
Minimum
3.13
2.5
1.2
1.33
0
0
-
-
-
-
-
PCI-
XIO
(MHz)
33
PCI-
XIO
(MHz)
33
Chapter 1: Integrated Circuit Data
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
LAN
(MHz)
30
LAN
(MHz)
30
Typical
3.30
2.6
1.3
1.4
-
-
20.2
15.5
13.1
5.4
4.2
PNX17xx Series
AO
AI
(MHz)
25
AO
AI
(MHz)
25
Maximum
3.47
2.7
1.4
1.47
85
105
-
-
-
-
-
SPDO
(MHz)
40
SPDO
(MHz)
40
GPIO
(MHz)
108
GPIO
(MHz)
108
Units
V
V
V
V
˚C
˚C
˚C/W
˚C/W
˚C/W
˚C/W
˚C/W
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