PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 688
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
Table 2: LAN100 Registers
PNX17XX_SER_1
Preliminary data sheet
Bit
The values represent the status of the three channels/datapaths. In case the status is 1 the channel is active meaning it:
The status transitions from active to inactive if the channel is disabled by software resetting the Tx/Rt/TxRtEnable bit in the
Command register and if the channel has committed the status and data of the current frame to memory. The status also
transition to inactive if the transmit queue is empty or if the receive queue is full and status and data have been committed to
memory.
31:3
2
1
0
Offset 0x07 2108
The receive descriptor base address is a byte address aligned to a word boundary, (i.e. the two LSBs of the address are
fixed to 0). The register contains the lowest address in the array of descriptors.
31:2
1:0
Offset 0x07 210c
The receive status base address is a byte address aligned to a double word boundary i.e. LSB 2:0 are fixed to 3’b000.
31:3
2:0
Offset 0x07 2110
This register defines the number of descriptors in the descriptor array for which RxDescriptor is the base address. The
number of descriptors should match the number of states. The register uses minus-one encoding, i.e. if the array has 8
status elements, the value in the register should be 7.
31:16
15:0
Offset 0x07 2114
This register indexes the descriptor that is going to be filled next by the Receive Datapath. After a packet has been received,
hardware increments the index and wrapps to 0 when the value of RxDescriptorNumber has been reached. If the
RxProduceIndex equals RxConsumeIndex – 1, the array is full, and any further packets being received will cause a buffer
overrun error.
31:16
15:0
Offset 0x07 2118
• is enabled and the Rx/TxRt/TxEnable bit is set in the Command register or it just got disabled while still transmitting or
• and for transmit channels the transmit queue is not empty i.e. ProduceIndex != ConsumeIndex
• and for the receive channel the receive queue is not full i.e. ProduceIndex != ConsumeIndex - 1
receiving a frame
Symbol
-
TxRtStatus
TxStatus
RxStatus
RxDescriptor
-
RxStatus
-
-
RxDescriptorNumber
-
Rx Produce Index
Receive Descriptor Base Address Register (RxDescriptor)
Receive Status Base Address Register (RxStatus)
Receive Number of Descriptors Register (RxDescriptorNumber)
Receive Produce Index (RxProduceIndex)
Receive Consume Index (RxConsumeIndex)
…Continued
Acces
s
-
RO
RO
RO
R/W
RO
R/W
RO
-
R/W
-
RO
Value
0
0
0
0
0
Rev. 1 — 17 March 2006
Description
Unused
If ‘1’, the real-time transmit datapath is active. If ‘0’, the channel is
inactive.
If ‘1’, non-real-time transmit datapath is active. If ‘0’, the channel is
inactive.
If ‘1’, the receive datapath is active, if ‘0’, the channel is inactive.
MSBs of receive descriptor base address.
Fixed to 0.
MSBs of receive status base address.
Fixed to 0.
Unused
Number of descriptors in the descriptor array for which RxDescriptor
is the base address. The number of descriptors is minus-one
encoded.
Unused
Index of the descriptor that is going to be filled next by the Receive
Datapath.
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
23-15
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