PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 373
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
2.6 Mixer Structure
The state change of the odd_even signal is always tied to the rising edge of the vsync
signal.
registers
Other restrictions for the screen timing generation are as follows:
invalid HSYNCS/E settings: 0, 1, 2 > HTOTAL
invalid HBLNKS/E settings: 0, 1, > HTOTAL
invalid VSYNCS/E settings: 0, > VTOTAL
invalid VBLNKS/E settings: 0, > VTOTAL
invalid difference HSYNCE-HSYNCS: -1
invalid difference HBLNKE-HBLNKS: 0, -1, -2
In interlaced modes these differences are not allowed:1, 2, 3, 4 to guarantee
sufficiently long horizontal blanking:
invalid difference VSYNCE-VSYNCS: -1
invalid difference VBLNKE-VBLNKS: 0, -1, -2
invalid difference VBLNKE-VBLNKS: 0, -1, -2
The properly formatted pixels from each layer are combined in a cascaded series of
mixer units. There is one mixer unit associated with each layer unit within the QVCP.
For a given screen position, each mixing unit can select the pixel from the layer, the
pixel from the previous mixer, or a blend of the two pixels. If a layer does not generate
a valid pixel for a specific screen position, then the mixer will pass the pixel from the
previous mixer. If no layers are producing valid pixels, a background color will be
displayed. The mixer selection criteria are based on a number of functions ROPs that
can be used to create such common effects as color keying. There are no restrictions
on window size, position, or overlap. A mode such as PIP is simple to implement by
setting layer_N for full screen video and layer_N+1 to the PIP. PIP size and position
may be changed on a frame by frame basis. Effects such as blending a PIP in and out
of the full screen video are easy to achieve using the 256 level alpha blend capability
of each mixer.
The main functionality of the mixer stages is to compose the outgoing pixel streams
from each layer to the final display image. The mixer data path operates on 10 bits.
This includes clipping, alpha blending, inverting colors. Which of those functions is
applied and how, is defined in a set of raster operations (ROPs). A raster operation is
always a logical combination of several input keys and a specific ROP register which
enables one or more of the different key combinations. It (ROP operation) is like a
function that generates the output based on a logical combination of several input
signals and the programmable ROP register.
Each mixer knows 4 different keys (Key0, Key1, Key2, Key3) as illustrated in the mixer
block diagram.
–
Key0, output key from previous layer, KeyPass ROP
Figure 14
identifies screen display parameters controlled by fields in the STG
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 11: QVCP
11-16
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