PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 93
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
7. Image Processing
PNX17XX_SER_1
Preliminary data sheet
6.1 VLD
6.2 DVD De-scrambler
7.1 Pixel Format
The PNX17xx Series VLD is an MPEG-1 and MPEG-2 parser that writes to memory
a separate data structure for macro block header and coefficient information. It is
capable of sustaining an ATSC (High Definition) bitrate. It off-loads the CPU in
applications involving MPEG-2 decoding or transcoding. Low to medium bitrate VLD
decoding, as well as VLC encoding may be done by the TM5250 CPU. MPEG-2 HD
decoding by the CPU is not supported due to CPU and system limitations.
The DVD-CSS module is provided to allow integrated DVD playback capability.
It provides authentication and de-scrambling for DVDs. A DVD drive can be attached
to the integrated medium-bandwidth IDE controller, and provides its data either
across the IDE interface or across a multi bit serial interface to the GPIO pins. The
resulting system memory scrambled program stream is de-scrambled by invoking a
memory to memory operation on the DVD-CSS module. The ‘cleartext’ program
stream is then de-multiplexed by software on the TM5250.
More detailed Information available on (legal) request
The on-chip hardware image processing modules all use the same ‘native’ pixel
formats, as shown in
can be read by another module.
Remark: The native formats of PNX17xx Series include the most common indexed,
packed RGB, packed YUV and planar YUV formats used by Microsoft DirectX and
Apple Quicktime, with 100% bit layout compatibility in little and big-endian modes of
operation, respectively.
•
•
•
•
•
A limited number of native pixel formats are supported by all image subsystems,
as appropriate.
The Memory Based Scaler supports conversion from arbitrary pixel formats to
any native format during the anti-flicker filtering operation. This operation is
usually required on graphics images anyway, hence no extra passes are
introduced.
Hardware subsystems support all native pixel formats in both little-endian and
big-endian system operation.
Software always sees the same component layout for a native pixel format unit,
whether it is running in little-endian or big-endian mode. i.e. for a given native
format, R, G, B (or Y,U,V) and alpha are always in the same place.
Software (on the TM5250 CPU) can be written endian-mode independent, even
when doing SIMD style vectorized computations
Rev. 1 — 17 March 2006
Table
5. This ensures that image data produced by one module
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 2: Overview
2-12
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