PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 777
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
Table 5: Status Codes
Table 6: IIC Registers
PNX17XX_SER_1
Preliminary data sheet
Status
Code
STA
0xC8
0xF8
MST—Master
SLV—Slave
REC—Receiver
TRX—Transmitter
Bit
Offset 0x04 500C
31:8
7:1
0
Symbol
Unused
SLAVE_ADDR
GEN_CALL_ADDR
Bus/Module
Status
Last data byte in
DAT has been
transmitted (AA =
0); ACK has been
received
No information
available
…Continued
I2C ADDRESS REGISTER
Bit [7:1]: SLAVE_ADDR Slave Address
SLAVE_ADDR is not affected by the IIC module hardware. The contents of this
register are irrelevant when IIC module is in a master mode. In the slave mode, the
bits 7:1 must be loaded with the micro controller’s own slave address. These bits
correspond to the 7-bit slave address which will be recognized on the incoming data
stream from the I
enabled, a serial interrupt will be generated.
Bit 0: GEN_CALL_ADDR General Call Address
When this bit is set, the general call address (Slave Address[7:1] on I
R/W bit on I
Application Software Response
To/From DAT
No STA action 0
No STA action 0
No STA action 1
No STA action 1
No DAT action No IIC_CONTROL action
Acces
s
R/W
R/W
2
C bus = 0) is recognized. If not set, this bit is ignored.
Value
-
0x00
0x0
To CON
STA
SLA—Slave address
W—Write bit
R—Read bit
X—Don’t care bit
2
C bus. When the slave address is detected and the interface is
Rev. 1 — 17 March 2006
Description
Ignore upon read. Write as zeroes.
Slave address when in slave mode
General call address
STO
0
0
0
0
0 = Does not generate interrupt if general call address is
detected on the I
1= Generates interrupt if general call address is detected.
SI
0
0
0
0
AA
0
1
0
1
2
C bus.
Next Action Taken
Switched to “not addressed” SLV mode; no
recognition of own SLA or general call
address.
Switched to “not addressed” SLV mode;
own SLA will be recognized; general call
address will be recognized if ADR(0) =’1’.
Switched to “not addressed” SLV mode; no
recognition of own SLA or general call
address. A START condition will be
transmitted when the bus becomes free.
Switched to “not addressed” SLV mode;
Own SLA will be recognized; general call
address will be recognized if ADR(0) =’1’. A
START condition will be transmitted when
the bus becomes free.
Wait or proceed with current transfer.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 25: I
2
C bus = 0x00,
2
C Interface
25-16
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