PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 449
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Raw Data Capture
Raw data capture overrides ANC or AUX data capture modes when enabled. In this
raw capture mode, any validated data at the video port is captured regardless of
external or embedded synchronization signals.
AUX Data Write to Memory
Auxiliary data capture formats, for writing into the frame buffer, are limited to raw luma
and chroma samples in 8 or 10 bit formats (extended to 16 bit). Optionally, writing of
chroma samples can be omitted.
Capture Enable Mode
The aux_cfen
cfen=0, no auxiliary data is captured. Once the capture of an auxiliary window has
started, resetting these bits has no effect until the end of the video window.
The aux_anc
capture of an ANC block has started, resetting of these bits has no effect until the end
of the data block.
The aux_raw
internal syncs. If raw capture is enabled,
The aux_bsize
AUX data.
The aux_pitch
pixel on a line to the same pixel on the next line, when pitch mode is enabled. Pitch
mode is also defined for the ANC data capture, where each packet is treated as a
new video line.
The
condition is reached. End of AUX window wrap condition also applies to ANC
capture, even if AUX capture is disabled.
The data buffered in the local FIFOs is flushed when a wrap condition is reached or in
pitch mode at the end of each video line or ANC packed. For the raw mode, the data
is also flushed when disabling raw capture.
Address Generation
The AUX DMA base address register provides 28 bits to specify a destination
address for storing the AUX data in the frame buffer. The address generation is
similar to that of video capture, except for the missing double-buffer and field modes.
The relationship between the input data formats and the different video and auxiliary
data capture scenarios is shown in
current VIP design does not support mixing of AUX and ANC data.
aux_osm
bit enables continuous capturing of raw samples regardless of external or
bits specify the type of ancillary data blocks to be fetched. Once the
bits specify the fields from which the device is to capture the AUX data. If
bit can be used to automatically limit capture by stopping after any wrap
bits specify the AUX line pitch, i.e. , the difference in the address from a
value specifies, in number of bytes, the size of the buffer available for
Rev. 1 — 17 March 2006
Table
aux_cfen and aux_anc
8. It is important to note, however, that the
Chapter 12: Video Input Processor
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
bit settings are ignored.
12-18
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