PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 437
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
This is strictly a single-stream mode, where VIP captures on Channel A
(dv_data[9:0]) either 10-bit or 8-bit (MSB aligned, with dv_data[1:0] unused)
multiplexed YUV video data with embedded syncs. The DUAL_STREAM register
should be programmed to 0 in this mode.
VMI Mode
The VMI Mode is an 8-bit YUV (4:2:2) mode with external horizontal and vertical
reference signals, which follows the VMI protocol. Chrominance and luminance input
samples are multiplexed into a single 8-bit input data stream on Channel A. The Field
Identifier (FID) is derived from the horizontal and vertical sync timing relation.
This is also a single-stream mode, where VIP captures on Channel A (dv_data[9:0])
8-bit VMI data with explicit syncs, where dv_data[9:2] correspond to VMI data and
dv_data[1:0] correspond to VREF and HREF respectively. The DUAL_STREAM
register should be programmed to 0 in this mode.
RAW Mode
In Raw Mode, valid 8-bit or 10-bit data are continuously captured and written into
system memory. Both single and dual streams are supported in this mode. The
DUAL_STREAM register can, therefore, be programmed to either 1 or 0 in this mode.
In the single stream mode (DUAL_STREAM register = 0), 8-bit data (dv_data[9:2]) is
captured as it is but 10-bit data (dv_data[9:0]) is extended to 16 bits by either adding
leading zeros or by sign-extension.
In the dual stream mode (DUAL_STREAM register = 1), only 8 MSBs of the 10-bit
data are valid for each of the 2 channels: A and B. Two 8-bit data, dv_data[9:2] and
dv_d_data[9:2], are captured simultaneously from the 8 upper bits of both the
channels, for both 8-bit or 10-bit modes, and packed into one 16-bit entity. Channel A
and Channel B data occupy the 8 LSBs and 8 MSBs respectively, of the packed 16-bit
result.
Raw Mode is only available in the auxiliary capture path of the VIP. It can be enabled
independent of D1 or VMI mode.
Remark: RAW mode may not be supported in next PNX17xx Series generations.
HD Mode
This is strictly a DUAL_STREAM mode (DUAL_STREAM register = 1), where VIP
expects 10-bit Y and 10-bit U/V data on 2 separate inputs (Channels A and B); the U/
V data is time multiplexed. In order to support a number of external decoders, this
mode has been implemented to work not only with embedded or encoded syncs
where EAV and SAV codes are embedded in the data, but also with explicit syncs
where the synchronization reference is provided explicitly via HREF, VREF, and FREF
Figure 5:
D1 Data Stream
Rev. 1 — 17 March 2006
Channel A
FF
EAV/SAV
00
00
XY
U
Chapter 12: Video Input Processor
Y
V
Y U Y
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
12-6
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