CS42428-CQZ Cirrus Logic Inc, CS42428-CQZ Datasheet - Page 45

IC CODEC 8CH PLL 192KHZ 64-LQFP

CS42428-CQZ

Manufacturer Part Number
CS42428-CQZ
Description
IC CODEC 8CH PLL 192KHZ 64-LQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS42428-CQZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
114 / 114
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.13 V ~ 5.25 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
8
No. Of Input Channels
2
No. Of Output Channels
15
Adc / Dac Resolution
24bit
Sampling Rate
192kSPS
Ic Interface Type
I2C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1499 - BOARD EVAL FOR CS42428 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1031

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS42428-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
135
Part Number:
CS42428-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
CS42428-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS605F1
6.5
6.5.1
6.5.2
6.5.3
DIF1
7
ADC_OL1
DAC_OL1
Interface Formats (address 04h)
DIGITAL INTERFACE FORMAT (DIFX)
ADC ONE_LINE MODE (ADC_OLX)
DAC ONE_LINE MODE (DAC_OLX)
DIF1
Default = 01
Function:
Default = 00
Function:
Default = 00
Function:
0
0
1
1
0
0
1
1
0
0
1
1
These bits select the digital interface format used for the ADC & DAC Serial Port when not in One-Line
Mode. The required relationship between the Left/Right clock, serial clock, and serial data is defined by
the Digital Interface Format and the options are detailed in
These bits select which mode the ADC will use. By default, One-Line Mode is disabled, but it can be
selected using these bits. Please see Figures
One-Line Mode 2.
These bits select which mode the DAC will use. By default, One-Line Mode is disabled, but it can be
selected using these bits. Please see Figures
One-Line Mode 2.
DIF0
6
ADC_OL0
DAC_OL0
DIF0
0
1
0
1
0
1
0
1
0
1
0
1
ADC_OL1
Left-Justified, up to 24-bit data
I²S, up to 24-bit data
Right-Justified, 16-bit or 24-bit data
Reserved
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
Reserved
DIF: take the DIF setting from reg04h[7:6]
One-Line #1
One-Line #2
Reserved
5
Table 6. Digital Interface Formats
Table 7. ADC One-Line Mode
Table 8. DAC One-Line Mode
ADC_OL0
4
Description
Description
Description
DAC_OL1
14
14
and
and
3
15
15
to see the format of One-Line Mode 1 and
to see the format of One-Line Mode 1 and
Figures
DAC_OL0
2
11-13.
Format
Format
Format
Reserved
0
1
2
3
4
3
4
-
-
-
-
-
1
Figure
Figure
Figure
CODEC_RJ16
CS42428
12
14
15
14
15
13
11
-
-
-
-
-
0
45

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