CS42428-CQZ Cirrus Logic Inc, CS42428-CQZ Datasheet - Page 48

• Manufacturer Part Number: CS42428-CQZ
• Description: IC CODEC 8CH PLL 192KHZ 64-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42428-CQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 8
• No. Of Input Channels: 2
• No. Of Output Channels: 15
• Adc / Dac Resolution: 24bit
• Sampling Rate: 192kSPS
• Ic Interface Type: I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1499 - BOARD EVAL FOR CS42428 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1031

48
6.7
6.7.1
6.7.2
6.7.3
RMCK_DIV1
7
Clock Control (address 06h)
RMCK DIVIDE (RMCK_DIVX)
OMCK FREQUENCY (OMCK FREQX)
PLL LOCK TO LRCK (PLL_LRCK)
Default = 00
Function:
Default = 00
Function:
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, the internal PLL of the CS42428 will lock to the ADC_LRCK of the ADC serial port
(ADC_LRCK) while the ADC_SP is in Slave Mode.
Divides/multiplies the internal MCLK, either from the PLL or OMCK, by the selected factor.
Sets the appropriate frequency for the supplied OMCK.
RMCK_DIV0
OMCK Freq1 OMCK Freq0
6
0
0
1
1
OMCK Freq1
RMCK_DIV1 RMCK_DIV0
5
0
0
1
1
Table 10. OMCK Frequency Settings
0
1
0
1
Table 9. RMCK Divider Settings
OMCK Freq0
11.2896 MHz or 12.2880 MHz
16.9344 MHz or 18.4320 MHz
22.5792 MHz or 24.5760 MHz
Reserved
4
0
1
0
1
PLL_LRCK
Description
Multiply by 2
Divide by 1
Divide by 2
Divide by 4
3
Description
SW_CTRL1
2
SW_CTRL0
1
FRC_PLL_LK
CS42428
DS605F1
0