CS42428-CQZ Cirrus Logic Inc, CS42428-CQZ Datasheet - Page 58

• Manufacturer Part Number: CS42428-CQZ
• Description: IC CODEC 8CH PLL 192KHZ 64-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42428-CQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 8
• No. Of Input Channels: 2
• No. Of Output Channels: 15
• Adc / Dac Resolution: 24bit
• Sampling Rate: 192kSPS
• Ic Interface Type: I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1499 - BOARD EVAL FOR CS42428 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1031

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6.21.2 CHANNEL MUTES SELECT (M_AOUTXX)
6.22
6.22.1 MODE CONTROL (MODEX)
6.22.2 POLARITY SELECT (POLARITY)
Mode1
7
General-Purpose Pin Control (addresses 29h to 2Fh)
Default = 11111
0 - Channel mute is not mapped to the MUTEC pin
1 - Channel mute is mapped to the MUTEC pin
Function:
Determines which channel mutes will be mapped to the MUTEC pin. If no channel mute bits are
mapped, then the MUTEC pin is driven to the “active” state as defined by the POLARITY bit. These
Channel Mute Select bits are “ANDed” together in order for the MUTEC pin to go active. This means
that if multiple Channel Mutes are selected to be mapped to the MUTEC pin, all corresponding chan-
nels must be muted before the MUTEC will go active.
Default = 00
00 - Reserved
01 - Mute Mode
10 - GPO/Overflow Mode
11 - GPO, Drive High Mode
Function:
Mute Mode - The pin is configured as a dedicated mute pin. The muting function is controlled by the
Function bits.
GPO, Drive Low / ADC Overflow Mode - The pin is configured as a general-purpose output driven low
or as a dedicated ADC overflow pin indicating an over-range condition anywhere in the ADC signal
path for either the left or right channel. The Functionx bits determine the operation of the pin. When
configured as a GPO with the output driven low, the driver is a CMOS driver. When configured to iden-
tify an ADC Overflow condition, the driver is an open drain driver requiring a pull-up resistor.
GPO, Drive High Mode - The pin is configured as a general purpose output driven high.
Default = 0
Function:
Mute Mode - If the pin is configured as a dedicated mute output pin, the polarity bit determines the
polarity of the mapped pin according to the following
0 - Active low
1 - Active high
GPO, Drive Low / ADC Overflow Mode - If the pin is configured as a GPO, Drive Low / ADC Overflow
Mode pin, the polarity bit is ignored. It is recommended that in this mode this bit be set to 0.
GPO, Drive High - If the pin is configured as a general-purpose output driven high, the polarity bit is
ignored. It is recommended that in this mode this bit be set to 0.
Mode0
6
Polarity
5
Function4
4
Function3
3
Function2
2
Function1
1
CS42428
Function0
DS605F1
0