CS42428-CQZ Cirrus Logic Inc, CS42428-CQZ Datasheet - Page 59

IC CODEC 8CH PLL 192KHZ 64-LQFP

CS42428-CQZ

Manufacturer Part Number
CS42428-CQZ
Description
IC CODEC 8CH PLL 192KHZ 64-LQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS42428-CQZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
114 / 114
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.13 V ~ 5.25 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
8
No. Of Input Channels
2
No. Of Output Channels
15
Adc / Dac Resolution
24bit
Sampling Rate
192kSPS
Ic Interface Type
I2C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1499 - BOARD EVAL FOR CS42428 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1031

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS42428-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
135
Part Number:
CS42428-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
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Part Number:
CS42428-CQZR
Manufacturer:
Cirrus Logic Inc
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DS605F1
6.22.3 FUNCTIONAL CONTROL (FUNCTIONX)
GPOx
GPO7
pin 42
GPO6
pin 43
GPO5
pin 44
GPO4
pin 45
GPO3
pin 46
GPO2
pin 47
GPO1
pin 48
Default = 00000
Function:
Mute Mode - If the pin is configured as a dedicated mute pin, the functional bits determine which chan-
nel mutes will be mapped to this pin according to the following table.
0 - Channel mute is not mapped to the GPOx pin
1 - Channel mute is mapped to the GPOx pin:
GPO, Drive Low / ADC Overflow Mode - If the pin is configured as a GPO, Drive Low / ADC Overflow
Mode pin, the Function1 and Function0 bits determine how the output will behave according to the
following table. It is recommended that in this mode the remaining functional bits be set to 0.
GPO, Drive High - If the pin is configured as a general-purpose output, the functional bits are ignored
and the pin is driven high. It is recommended that in this mode all the functional bits be set to 0.
Reg Address
2Ch
2Dh
29h
2Ah
2Bh
2Eh
2Fh
Function1
0
1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
Function4
Function0
0
1
M_AOUTB1
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
Function3
OVFL R or L
Drive Low
GPOx
M_AOUTA2
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTA3
M_AOUTA3
M_AOUTA3
M_AOUTB3
M_AOUTA3
M_AOUTB3
Function2
Driver Type
Open Drain
CMOS
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTA3
M_AOUTA3
M_AOUTA3
M_AOUTA4
M_AOUTA4
Function1
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTA4
M_AOUTA4
M_AOUTA4
M_AOUTA4
M_AOUTA4
Function0
CS42428
59

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