LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 195
LAN9311-NU
Manufacturer Part Number
LAN9311-NU
Description
IC ETHER SW 2PRT 16BIT 128-VTQFP
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Specifications of LAN9311-NU
Controller Type
Ethernet Switch Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1076 - EVALUATION BOARD LAN9311-NU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1075
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9311-NU
Manufacturer:
CINCERA
Quantity:
3 023
Company:
Part Number:
LAN9311-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN9311-NU
Manufacturer:
SMSC
Quantity:
20 000
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.3.2
31:28
27:16
15:12
BITS
11:0
RESERVED
GPIO Direction 11-0 (GPIODIR[11:0])
These bits set the input/output direction of the 12 GPIO pins.
0: GPIO pin is configured as an input
1: GPIO pin is configured as an output
RESERVED
GPIO Data 11-0 (GPIOD[11:0])
When a GPIO pin is enabled as an output, the value written to this field is
output on the corresponding GPIO pin. Upon a read, the value returned
depends on the current direction of the pin. If the pin is an input, the data
reflects the current state of the corresponding GPIO pin. If the pin is an
output, the data is the value that was last written into this register. For
GPIOs 11-10 and 7-0, the pin direction is determined by the GPDIR bits of
this register. For GPIOs 9 and 8, the pin direction is determined by the
GPDIR bits and the 1588_GPIO_OE bits in the
Configuration Register
General Purpose I/O Data & Direction Register (GPIO_DATA_DIR)
This read/write register configures the direction of the 12 GPIO pins and contains the GPIO input and
output data bits.
Offset:
(GPIO_CFG).
1E4h
DESCRIPTION
DATASHEET
195
General Purpose I/O
Size:
32 bits
TYPE
R/W
R/W
RO
RO
Revision 1.7 (06-29-10)
DEFAULT
0h
0h
-
-
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