LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 253

• Manufacturer Part Number: LAN9311-NU
• Description: IC ETHER SW 2PRT 16BIT 128-VTQFP
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9311-NU

• Controller Type: Ethernet Switch Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1076 - EVALUATION BOARD LAN9311-NU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1075

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.8.5
31:16
BITS
15
14
13
12
11
10
9
8
7
6
RESERVED
(See
Next Page
This bit determines the advertised next page capability and is always 0.
0: Virtual PHY does not advertise next page capability
1: Virtual PHY advertises next page capability
RESERVED
Remote Fault
This bit is not used since there is no physical link partner.
RESERVED
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
100BASE-T4
This bit determines the advertised 100BASE-T4 capability and is always 0.
0: 100BASE-T4 ability not advertised
1: 100BASE-T4 ability advertised
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
10BASE-T Full Duplex
This bit determines the advertised 10BASE-T full duplex capability.
0: 10BASE-T full duplex ability not advertised
1: 10BASE-T full duplex ability advertised
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
This read/write register contains the advertised ability of the Virtual PHY and is used in the Auto-
Negotiation process with the link partner.
Note: This register is re-written in its entirety by the EEPROM Loader following the release or reset
Note
or a RELOAD command. Refer to
information.
14.27)
Offset:
Index (decimal):
1D0h
4
DESCRIPTION
DATASHEET
253
Section 10.2.4, "EEPROM Loader," on page 150
Size:
32 bits
TYPE
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
Revision 1.7 (06-29-10)
Note 14.28
Note 14.29
Note 14.30
Note 14.31
DEFAULT
0b
0b
0b
0b
1b
1b
1b
for more
-
-
-