LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 227
LAN9311-NU
Manufacturer Part Number
LAN9311-NU
Description
IC ETHER SW 2PRT 16BIT 128-VTQFP
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Specifications of LAN9311-NU
Controller Type
Ethernet Switch Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1076 - EVALUATION BOARD LAN9311-NU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1075
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Quantity
Price
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.5.23
31:25
BITS
15:9
24
23
22
21
20
19
18
17
16
8
7
6
5
4
RESERVED
1588 Port 2 RX Interrupt Enable (1588_PORT2_RX_EN)
1588 Port 2 TX Interrupt Enable (1588_PORT2_TX_EN)
1588 Port 1 RX Interrupt Enable (1588_PORT1_RX_EN)
1588 Port 1 TX Interrupt Enable (1588_PORT1_TX_EN)
1588 Port 0(Host MAC) RX Interrupt Enable (1588_MII_RX_EN)
1588 Port 0(Host MAC) TX Interrupt Enable (1588_MII_TX_EN)
GPIO9 1588 Interrupt Enable (1588_GPIO9_EN)
GPIO8 1588 Interrupt Enable (1588_GPIO8_EN)
1588 Timer Interrupt Enable (1588_TIMER_EN)
RESERVED
1588 Port 2 RX Interrupt (1588_PORT2_RX_INT)
This interrupt indicates that a packet received by Port 2 matches the
configured PTP packet and the 1588 clock was captured.
1588 Port 2 TX Interrupt (1588_PORT2_TX_INT)
This interrupt indicates that a packet transmitted by Port 2 matches the
configured PTP packet and the 1588 clock was captured.
1588 Port 1 RX Interrupt (1588_PORT1_RX_INT)
This interrupt indicates that a packet received by Port 1 matches the
configured PTP packet and the 1588 clock was captured.
1588 Port 1 TX Interrupt (1588_PORT1_TX_INT)
This interrupt indicates that a packet transmitted by Port 1 matches the
configured PTP packet and the 1588 clock was captured.
1588 Port 0(Host MAC) RX Interrupt (1588_MII_RX_INT)
This interrupt indicates that a packet from the switch fabric to the Host MAC
the matches the configured PTP packet and the 1588 clock was captured.
Note:
1588 Interrupt Status and Enable Register (1588_INT_STS_EN)
This read/write register contains the IEEE 1588 interrupt status and enable bits.
Writing a 1 to any of the interrupt status bits acknowledges and clears the interrupt. If enabled, these
interrupt bits are cascaded into bit 29 (1588_EVNT) of the
a 1 to any of the interrupt enable bits will enable the corresponding interrupt as a source. Status bits
will still reflect the status of the interrupt source regardless of whether the source is enabled as an
interrupt in this register. Bit 29 (1588_EVNT_EN) of the
be set in order for an actual system level interrupt to occur. Refer to
on page 49
For Port 0, receive is defined as data from the switch fabric, while
transmit is to the switch fabric.
Offset:
for additional information.
198h
DESCRIPTION
DATASHEET
227
Size:
Interrupt Enable Register (INT_EN)
Interrupt Status Register
32 bits
Chapter 5, "System Interrupts,"
TYPE
R/WC
R/WC
R/WC
R/WC
R/WC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Revision 1.7 (06-29-10)
(INT_STS). Writing
DEFAULT
must also
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
-
-
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