LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 325
LAN9311-NU
Manufacturer Part Number
LAN9311-NU
Description
IC ETHER SW 2PRT 16BIT 128-VTQFP
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Specifications of LAN9311-NU
Controller Type
Ethernet Switch Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1076 - EVALUATION BOARD LAN9311-NU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1075
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9311-NU
Manufacturer:
CINCERA
Quantity:
3 023
Company:
Part Number:
LAN9311-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN9311-NU
Manufacturer:
SMSC
Quantity:
20 000
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.5.2.2
BITS
31:8
7
6
5
4
3
2
1
0
RESERVED
RESERVED
Note:
RESERVED
Enable Receive Own Transmit
When set, the switch port will receive its own transmission if it is looped back
from the PHY. Normally, this function is only used in Half Duplex PHY
loopback.
RESERVED
Jumbo2K
When set, the maximum packet size accepted is 2048 bytes. Statistics
boundaries are also adjusted.
RESERVED
Reject MAC Types
When set, MAC control frames (packets with a type field of 8808h) are
filtered. When cleared, MAC Control frames, other than MAC Control Pause
frames, are sent to the forwarding process. MAC Control Pause frames are
always consumed by the switch.
RX Enable
When set, the receive port is enabled. When cleared, the receive port is
disabled.
Port x MAC Receive Configuration Register (MAC_RX_CFG_x)
This read/write register configures the packet type passing parameters of the port.
This bit must always be written as 0.
Register #:
Port0: 0401h
Port1: 0801h
Port2: 0C01h
DESCRIPTION
DATASHEET
325
Size:
32 bits
TYPE
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
Revision 1.7 (06-29-10)
DEFAULT
0b
0b
0b
1b
1b
-
-
-
-
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