SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 63

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

Figure 31 shows the state diagram for the Secondary. Note that in order to be able to
hold ‘Active On Loop’ state ‘flags’ has to be selected as interframe time fill, as opposed
to ‘idle’.
Note: The Primary Station has to operate in standard SDLC mode.
Figure 31
State Diagram of SDLC Loop/Secondary
Reception of Frames
SDLC Loop as special variant of the SDLC protocol works in half-duplex normal
response mode, that means that data transmission and data reception at the same time
is not permitted. Normally, data reception is only possible in the On Loop state.
The ESCC2, however, allows data reception in every state. Activation/deactivation of the
receiver is effected by the user by programming the RAC bit in register MODE.
Transmission of Frames
Sending frames is only possible in the Active On Loop state. Here, transmission can start
with the XTF command. If necessary, flags as Interframe Timefill are inserted before the
current frame begins (the modified EOP and the first flag may share a ‘0’). After finishing
frame transmission, flags as Interframe Timefill are again sent until the ‘Go Active On
Loop’ command (GALP) is reset. By returning to On Loop state an EOP sequence is
formed, the transmitter is disabled and RxD is connected to TxD again with one bit delay.
Note: XTF or XIF may be issued before the Active On Loop state is reached. In this case,
Semiconductor Group
transmission starts immediately after entering the Active On Loop state. The
opening flag of the first frame is sent out immediately following after the modified
EOP sequence (both may share a ‘0’).
63
SAB 82532/SAF 82532
HDLC/SDLC Serial Mode
07.96