PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 111

• Manufacturer Part Number: PIC16F1827-E/P
• Description: 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1827-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Standby Current (pic16lf182x): 30 nA @ 1.8 V, Typical

11.4
When modifying existing data in a program memory
row, and data within that row must be preserved, it must
first be read and saved in a RAM image. Program
memory is modified using the following steps:
1.
2.
3.
4.
5.
6.
7.
8.
TABLE 11-2:
EXAMPLE 11-3:
 2011 Microchip Technology Inc.
* This code block will read 1 word of program memory at the memory address:
*
*
Load the starting address of the row to be mod-
ified.
Read the existing data from the row into a RAM
image.
Modify the RAM image to contain the new data
to be written into program memory.
Load the starting address of the row to be rewrit-
ten.
Erase the program memory row.
Load the write latches with data from the RAM
image.
Initiate a programming operation.
Repeat steps 6 and 7 as many times as required
to reprogram the erased row.
PROG_ADDR_LO (must be 00h-08h) data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
CLRF
BSF
BCF
BSF
NOP
NOP
BSF
MOVF
MOVWF
MOVF
MOVWF
Modifying Flash Program Memory
8000h-8003h
8007h-8008h
Address
8006h
EEADRL
PROG_ADDR_LO
EEADRL
EEADRH
EECON1,CFGS
INTCON,GIE
EECON1,RD
INTCON,GIE
EEDATL,W
PROG_DATA_LO
EEDATH,W
PROG_DATA_HI
USER ID, DEVICE ID AND CONFIGURATION WORD ACCESS (CFGS = 1)
CONFIGURATION WORD AND DEVICE ID ACCESS
Configuration Words 1 and 2
Device ID/Revision ID
; Select correct Bank
;
; Store LSB of address
; Clear MSB of address
; Select Configuration Space
; Disable interrupts
; Initiate read
; Executed (See
; Ignored (See
; Restore interrupts
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
Function
User IDs
Figure
Figure
11-1)
11.5
Instead of accessing program memory or EEPROM
data memory, the User ID’s, Device ID/Revision ID and
Configuration Words can be accessed when CFGS = 1
in the EECON1 register. This is the region that would
be pointed to by PC<15> = 1, but not all addresses are
accessible. Different access may exist for reads and
writes. Refer to
When read access is initiated on an address outside
the parameters listed in
ATL register pair is cleared.
11-1)
Read Access
PIC16(L)F1826/27
User ID, Device ID and
Configuration Word Access
Yes
Yes
Yes
Table
11-2.
Table
11-2, the EEDATH:EED-
Write Access
DS41391D-page 111
Yes
No
No