PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 211

• Manufacturer Part Number: PIC16F1827-E/P
• Description: 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1827-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Standby Current (pic16lf182x): 30 nA @ 1.8 V, Typical

24.3.7
In Sleep mode, the TMRx register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMRx will continue from its
previous state.
24.3.8
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)”
24.3.9
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 24-8:
 2011 Microchip Technology Inc.
APFCON0
CCPxCON
CCPxAS
CCPTMRS
INTCON
PR2
PR4
PR6
PSTRxCON
PWMxCON
T2CON
T4CON
T6CON
TMR2
TMR4
TMR6
TRISB
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by the PWM.
Note 1:
Name
2:
*
Page provides register information.
Applies to ECCP modules only.
PIC16(L)F1827 only.
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
Timer2 Period Register
Timer4 Module Period Register
Timer6 Module Period Register
Holding Register for the 8-bit TMR2 Time Base
Holding Register for the 8-bit TMR4 Time Base
Holding Register for the 8-bit TMR6 Time Base
RXDTSEL
CCPxASE
C4TSEL1
PxRSEN
PxM1
TRISB7
Bit 7
GIE
for additional details.
—
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
(1)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0
T6OUTPS3 T6OUTPS2 T6OUTPS1 T6OUTPS0
SDO1SEL
CCPxAS2
C4TSEL0
PxM0
TRISB6
PxDC6
PEIE
Bit 6
—
(1)
CCPxAS1
C3TSEL1
SS1SEL
TMR0IE
TRISB5
DCxB1
PxDC5
Bit 5
—
STRxSYNC
P2BSEL
CCPxAS0
C3TSEL0
TRISB4
DCxB0
PxDC4
INTE
Bit 4
(1)
(1)
(2)
CCP2SEL
PSSxAC1
C2TSEL1
CCPxM3
TRISB3
STRxD
PxDC3
IOCIE
24.3.10
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
registers, APFCON0 and APFCON1. To determine
which pins can be moved and what their default loca-
tions are upon a reset, see
Pin Function”
Bit 3
(2)
PIC16(L)F1826/27
PSSxAC0
C2TSEL0
TMR2ON
TMR4ON
TMR6ON
CCPxM2
P1DSEL
TMR0IF
TRISB2
STRxC
PxDC2
ALTERNATE PIN LOCATIONS
Bit 2
for more information.
PSSxBD1
T2CKPS1
T4CKPS1
T6CKPS1
C1TSEL1
CCPxM1
P1CSEL
TRISB1
STRxB
PxDC1
INTF
Bit 1
Section 12.1 “Alternate
CCP1SEL
PSSxBD0
T2CKPS0
T4CKPS0
T6CKPS0
C1TSEL0
CCPxM0
TRISB0
STRxA
PxDC0
IOCIF
DS41391D-page 211
Bit 0
Register
on Page
189*
189*
189*
189*
189*
189*
226
228
227
230
229
191
191
191
127
119
86