PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 193
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-E/P
Manufacturer Part Number
PIC16F1827-E/P
Description
7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-E/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
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23.0
The Data Signal Modulator (DSM) is a peripheral which
allows the user to mix a data stream, also known as a
modulator signal, with a carrier signal to produce a
modulated output.
Both the carrier and the modulator signals are supplied
to the DSM module either internally, from the output of
a peripheral, or externally through an input pin.
The modulated output signal is generated by perform-
ing a logical “AND” operation of both the carrier and
modulator signals and then provided to the MDOUT pin.
The carrier signal is comprised of two distinct and sep-
arate signals. A carrier high (CARH) signal and a car-
rier low (CARL) signal. During the time in which the
modulator (MOD) signal is in a logic high state, the
DSM mixes the carrier high signal with the modulator
signal. When the modulator signal is in a logic low
state, the DSM mixes the carrier low signal with the
modulator signal.
FIGURE 23-1:
2011 Microchip Technology Inc.
Comparator C1
Comparator C2
MSSP1 SDO1
MSSP2 SDO2
MDCL<3:0>
DATA SIGNAL MODULATOR
MDCH<3:0>
MDMS<3:0>
No Channel
No Channel
No Channel
EUSART
MDCIN1
MDCIN2
MDCIN1
MDCIN2
Reserved
Reserved
Reserved
MDMIN
Selected
Selected
Selected
MDBIT
CLKR
CCP1
CCP2
CCP3
CCP4
CCP1
CCP2
CCP3
CCP4
CLKR
CCP1
CCP2
CCP3
CCP4
V
V
SS
SS
SIMPLIFIED BLOCK DIAGRAM OF THE DATA SIGNAL MODULATOR
0000
0001
0010
0011
0100
0000
0001
0010
0011
0100
*
*
0000
0001
0010
0011
0100
0101
0110
0111
1000
*
*
1111
0101
0110
0111
1000
1001
1010
0011
1111
0101
0110
0111
1000
*
*
1111
CARH
MOD
CARL
MDCHPOL
MDCLPOL
MDEN
EN
D
D
SYNC
SYNC
Data Signal
Modulator
Q
Q
MDCLSYNC
Using this method, the DSM can generate the following
types of Key Modulation schemes:
• Frequency-Shift Keying (FSK)
• Phase-Shift Keying (PSK)
• On-Off Keying (OOK)
Additionally, the following features are provided within
the DSM module:
• Carrier Synchronization
• Carrier Source Polarity Select
• Carrier Source Pin Disable
• Programmable Modulator Data
• Modulator Source Pin Disable
• Modulated Output Polarity Select
• Slew Rate Control
Figure 23-1
Data Signal Modulator peripheral.
MDCHSYNC
1
0
1
0
PIC16(L)F1826/27
shows a Simplified Block Diagram of the
MDOPOL
MDOE
DS41391D-page 193
MDOUT
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