PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 24

• Manufacturer Part Number: PIC16F1827-E/P
• Description: 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1827-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Standby Current (pic16lf182x): 30 nA @ 1.8 V, Typical

TABLE 3-3:
Legend:
40Bh
40Ch
40Dh
40Eh
41Ah
41Bh
41Ch
41Dh
41Eh
400h
40Fh
410h
411h
412h
413h
414h
415h
416h
417h
418h
419h
41Fh
420h
46Fh
470h
47Fh
Unimplemented
Core Registers
Read as ‘0’
(Table
70h – 7Fh
BANK 8
T4CON
T6CON
Accesses
TMR4
TMR6
PR4
PR6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
= Unimplemented data memory locations, read as ‘0’
(1)
(1)
3-2)
(1)
(1)
(1)
(1)
PIC16(L)F1826/27 MEMORY MAP (CONTINUED)
48Bh
48Ch
48Dh
48Eh
49Ah
49Bh
49Ch
49Dh
49Eh
4A0h
4EFh
4FFh
480h
48Fh
490h
491h
492h
493h
494h
495h
496h
497h
498h
499h
49Fh
4F0h
Unimplemented
Core Registers
Read as ‘0’
(Table
70h – 7Fh
BANK 9
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
50Bh
50Ch
50Dh
50Eh
51Ah
51Bh
51Ch
51Dh
51Eh
500h
50Fh
510h
511h
512h
513h
514h
515h
516h
517h
518h
519h
51Fh
520h
56Fh
570h
57Fh
Unimplemented
Core Registers
BANK 10
Read as ‘0’
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
58Bh
58Ch
58Dh
58Eh
58Fh
59Ah
59Bh
59Ch
59Dh
59Eh
59Fh
5A0h
5EFh
5F0h
5FFh
580h
590h
591h
592h
593h
594h
595h
596h
597h
598h
599h
Unimplemented
Core Registers
BANK 11
Read as ‘0’
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
60Bh
60Ch
60Dh
60Eh
60Fh
61Ah
61Bh
61Ch
61Dh
61Eh
61Fh
66Fh
67Fh
600h
610h
611h
612h
613h
614h
615h
616h
617h
618h
619h
620h
670h
Unimplemented
Core Registers
Read as ‘0’
BANK 12
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
680h
68Bh
68Ch
68Dh
68Eh
68Fh
690h
691h
692h
693h
694h
695h
696h
697h
698h
699h
69Ah
69Bh
69Ch
69Dh
69Eh
69Fh
6A0h
6EFh
6F0h
6FFh
Unimplemented
Core Registers
Read as ‘0’
BANK 13
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
700h
70Bh
70Ch
70Dh
70Eh
70Fh
710h
712h
713h
714h
715h
716h
717h
718h
719h
71Ah
71Bh
71Ch
71Dh
71Eh
71Fh
720h
76Fh
770h
77Fh
711h
Unimplemented
Core Registers
Read as ‘0’
BANK 14
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)
780h
78Bh
78Ch
78Dh
78Eh
78Fh
790h
791h
792h
793h
794h
795h
796h
797h
798h
799h
79Ah
79Bh
79Ch
79Dh
79Eh
79Fh
7A0h
7EFh
7F0h
7FFh
Unimplemented
Core Registers
Read as ‘0’
BANK 15
(Table
70h – 7Fh
Accesses
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-2)