PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 6

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PIC16F1827-E/P

Manufacturer Part Number

PIC16F1827-E/P

Description

7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core

Manufacturer

Microchip Technology Inc.

Datasheet

1.PIC16F1826-ISO.pdf (406 pages)

Specifications of PIC16F1827-E/P

A/d Inputs

12-Channel, 10-Bit

Comparators

2

Cpu Speed

8 MIPS

Eeprom Memory

256 Bytes

Input Output

16

Interface

CAN/I2C/SPI/UART/USART

Memory Type

Flash

Number Of Bits

8

Package Type

18-pin PDIP

Programmable Memory

7K Bytes

Ram Size

384 Bytes

Speed

32 MHz

Timers

4-8-bit, 1-16-bit

Voltage, Range

1.8-5.5 V

Standby Current (pic16lf182x)

30 nA @ 1.8 V, Typical

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TABLE 1:

Note 1:

RA0

RA1

RA2

RA3

RA4

RA5

RA6

RA7

RB0

RB1

RB2

RB3

RB4

RB5

RB6

RB7

V

Vss

DD

2:

3:

4:

17

18

15

16

10

11

12

13

14

1

2

3

4

6

7

8

9

5

Pin functions can be moved using the APFCON0 or APFCON1 register.

Functions are only available on the PIC16(L)F1827.

Weak pull-up always enabled when MCLR is enabled, otherwise the pull-up is under user control.

Default function location.

15,16 17,19

5,6

19

20

17

18

10

12

13

14

11

1

2

3

4

7

8

9

18/20/28-PIN SUMMARY (PIC16(L)F1826/27)

3,5

23

24

26

27

28

20

21

10

12

13

15

16

1

7

8

9

—

—

Y

Y

Y

Y

Y

N

N

N

N

Y

Y

Y

Y

Y

Y

Y

AN11

AN10

AN0

AN1

AN2

AN3

AN4

AN9

AN8

AN7

AN5

AN6

—

—

—

—

—

—

DACOUT

V

V

REF

REF

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

+

-

CPS11

CPS10

CPS0

CPS1

CPS2

CPS3

CPS4

CPS9

CPS8

CPS7

CPS5

CPS6

—

—

—

—

—

—

C12IN0-

C12IN1-

C12IN2-

C12IN3-

C12IN+

C1OUT

C2OUT

C1IN+

—

—

—

—

—

—

—

—

—

—

—

—

—

SRNQ

SRQ

SRI

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

T1OSO

T0CKI

T1CKI

T1OSI

T1G

—

—

—

—

—

—

—

—

—

—

—

—

—

—

CCP2

CCP2

CCP1

P2A

P2B

CCP3

CCP4

CCP1

P1C

P1D

P2B

P2A

P1A

P1D

P1C

P1A

FLT0

P1B

—

—

—

—

—

—

—

—

—

(1,2,4)

(1,2,4)

(1,2)

(1,2)

(1,4)

(1,4)

(1,2,4)

(1,4)

(1)

(1)

(1)

(1,2)

(1,4)

(2)

(2)

(1)

RX

RX

CK

DT

TX

CK

(1)

TX

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

(1,4)

(1,4)

(1,4)

,DT

(1,4)

(1)

(1)

(1)

SDO1

SDO2

SDO1

SDA2

SCK2

SCL2

SS1

SDI2

SS2

SS1

SDA1

SCL1

SCK1

SDI1

—

—

—

—

—

—

—

—

—

—

(1,4)

(2)

(1)

(1,4)

(2)

(2)

(2)

(1)

(2)

(2)

IOC

IOC

IOC

IOC

IOC

IOC

IOC

IOC

INT

—

—

—

—

—

—

—

—

—

—

MDOUT

MDCIN2

MDCIN1

MDMIN

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Y

—

—

N

N

N

N

N

N

N

Y

Y

Y

Y

Y

Y

Y

Y

(3)

MCLR, V

ICSPCLK/

ICSPDAT/

CLKOUT

ICDCLK

ICDDAT

CLKIN

OSC2

OSC1

CLKR

V

V

—

—

—

—

—

—

—

—

—

—

—

DD

SS

PP

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