PIC16F1827-E/P Microchip Technology Inc., PIC16F1827-E/P Datasheet - Page 90

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PIC16F1827-E/P

Manufacturer Part Number
PIC16F1827-E/P
Description
7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1827-E/P

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
PIC16(L)F1826/27
8.6.5
The PIE4 register contains the interrupt enable bits, as
shown in
REGISTER 8-5:
DS41391D-page 90
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-2
bit 1
bit 0
Note 1:
U-0
Register
This register is only available on PIC16(L)F1827.
PIE4 REGISTER
Unimplemented: Read as ‘0’
BCL2IE: MSSP2 Bus Collision Interrupt Enable bit
1 = Enables the MSSP2 Bus Collision Interrupt
0 = Disables the MSSP2 Bus Collision Interrupt
SSP2IE: Master Synchronous Serial Port 2 (MSSP2) Interrupt Enable bit
1 = Enables the MSSP2 interrupt
0 = Disables the MSSP2 interrupt
8-5.
U-0
PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4
(1)
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
U-0
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
Note 1: The PIE4 register is available only on the
2: Bit PEIE of the INTCON register must be
PIC16(L)F1827 device.
set to enable any peripheral interrupt.
U-0
 2011 Microchip Technology Inc.
(1)
R/W-0/0
BCL2IE
R/W-0/0
SSP2IE
bit 0

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