ADV202-SD-EB Analog Devices Inc, ADV202-SD-EB Datasheet - Page 18

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ADV202-SD-EB

Manufacturer Part Number
ADV202-SD-EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV202-SD-EB

Lead Free Status / Rohs Status
Not Compliant
ADV202
SPI PORT TIMING
Table 13.
Parameter
SCLK
SCLK
SCLK_hi
SCLK_lo
Data_su
Data_hd
CSEL_
CSEL_
DV_SCLK
DV_CS
SCLK
FALL
RIS
SU
HD
S_CSEL
S_CLK
S_MO
S_MI
Description
S_CLK Fall Time
S_CLK Rise Time
SCLK high time
SCLK Low Time
Data Setup Time
Data Hold Time
Active Setup Time
Active Hold Time
SCLK to Output Data Valid
CS to Output Data Valid
SCLK Period
CSEL
SCLK_HI
SU
DC_CS
MSB
MSB
DV_SCLK
SCLK_LO
Figure 23. SPI Port—Input Timing
SCLK
Rev. B | Page 18 of 40
RISE
SCLK
DATA
Min
6.5
6.5
135
155
36
FALL
SU
CSEL
DATA
LSB
LSB
Typ
5
5
75
75
2
150
HD
HD
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns