ADV202-SD-EB Analog Devices Inc, ADV202-SD-EB Datasheet - Page 25

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ADV202-SD-EB

Manufacturer Part Number
ADV202-SD-EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV202-SD-EB

Lead Free Status / Rohs Status
Not Compliant
THEORY OF OPERATION
The input video or pixel data is passed on to the ADV202’s pixel
interface, where samples are de-interleaved and passed on to the
wavelet engine, where each tile or frame is decomposed into
subbands using the 5/3 or 9/7 filters. The resultant wavelet
coefficients are then written to internal memory. The entropy
codecs then code the image data so that it conforms to the
JPEG2000 standard. An internal DMA provides high bandwidth
memory-to-memory transfers, as well as high performance
transfers between functional blocks and memory.
WAVELET ENGINE
The ADV202 provides a dedicated wavelet transform processor
based on the Analog Devices proven and patented SURF™
technology. This processor can perform up to six wavelet
decomposition levels on a tile. In encode mode, the wavelet
transform processor takes in uncompressed samples, performs
the wavelet transform and quantization, and writes the wavelet
coefficients in all frequency subbands to internal memory. Each
of these subbands is then further broken down into code blocks.
The code-block dimensions can be user-defined, and are used
by the wavelet transform processor to organize the wavelet
coefficients into code blocks when writing to internal memory.
Each completed code block is then entropy coded by one of the
entropy codecs.
In decode mode, wavelet coefficients are read from internal
memory and recomposed into uncompressed samples.
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ENTROPY CODECS
The entropy codec block performs context modeling and
arithmetic coding on a code block of the wavelet coefficients.
Additionally, this block also performs the distortion metric
calculations during compression that are required for optimal
rate and distortion performance. Because the entropy coding
process is the most computationally intensive operation in the
JPEG2000 compression process, three dedicated hardware
entropy codecs are provided on the ADV202.
EMBEDDED PROCESSOR SYSTEM
The ADV202 incorporates an embedded 32-bit RISC processor.
This processor is used for configuration, control, and manage-
ment of the dedicated hardware functions, as well as for parsing
and generation of the JPEG2000 code stream. The processor
system includes ROM and RAM for both program and data
memory, an interrupt controller, standard bus interfaces, and
other hardware functions such as timers and counters.
MEMORY SYSTEM
The memory system’s main function is to manage wavelet
coefficient data, interim code-block attribute data, and
temporary work space for creating, parsing, and storing the
JPEG2000 code stream. The memory system can also be used
for program and data memory for the embedded processor.
INTERNAL DMA ENGINE
The internal DMA engine provides high bandwidth memory-
to-memory transfers, as well as high performance transfers
between memory and functional blocks. This function is critical
for high speed generation and parsing of the code stream.
ADV202