AD9925BBCZ Analog Devices Inc, AD9925BBCZ Datasheet - Page 20

• Manufacturer Part Number: AD9925BBCZ
• Description: IC CCD SIGNAL PROCESSOR 96CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9925BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 96-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.8V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 96
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9925
Table 11. HBLK Pattern Registers
Register
HBLKMASK
H3HBLKOFF
HBLKALT
HBLKTOG1
HBLKTOG2
HBLKTOG3
HBLKTOG4
HBLKTOG5
HBLKTOG6
Generating S
There are six oggle
only two of the toggle positions are use
dard HBLK interval. However, the addi
may be used to generate special HBLK
Figure 26. The pattern in this example
tions to generate two extra groups of pu
interval. By changing the toggle positio
be created.
H1/H3
HBLK
NOTE
1. THE POLARITY OF H1 DURING BLANKING IS PROGRAMMABLE (H2 IS OPPOSITE POLARITY OF H1).
HBLK
PROGRAMMABLE SETTINGS:
1. FIRST TOGGLE POSITION = START OF BLANKING.
2. SECOND TOGGLE POSITION = END OF BLANKING.
HD
HD
t
Length
1 b
1 b
2 b
12 b
12 b
12 b
12 b
12 b
12 b
pecial H LK Patterns
H1/H3
H2/H4
posit
B
ions availab for HBLK. Normally,
Range
High/Low
High/Low
0 to 3 Alternation Mode
0 to 4095 Pixel Location
0 to 4095 Pixel Location
0 to 4095 Pixel Location
0 to 4095 Pixel Location
0 to 4095 Pixel Location
0 to 4095 Pixel Location
1
BLANK
le
uses all six toggle posi-
d to generate the stan-
patterns, as shown in
ns, different p
tional toggle positions
lses during the HBLK
2
Figure 24. Horizontal Blanking (HBLK) Pulse Placement
atterns can
Description
Masking Polarity for H1/H3 (0 = H1/H3 Low, 1 = H1/H3 High).
Addr 0xE7, Bit [6]. Set = 1 to keep H3/H4 active during HBLK pulse. Normal set to 0.
Enables Odd/Even A
0 = Disable Alternat
1 = TO
2 = 3 = TO
First Toggle Position within Line for Each Vertical Sequence 0 to 9.
Second Toggle Position within Line for Each Vertical Sequence 0 to 9.
Third Toggle Position within Line for Each Vertical Sequence 0 to 9.
Fourth Toggle Posit
Fifth Toggle Position within Line for Each Vertical Sequence 0 to 9.
Sixth Toggle Position within Line for Each Vertical Sequence 0 to 9.
Figure 25. HBLK Masking Control
Rev. A | Page 20 of 96
G1 to TOG2 O
G1to TOG
ion.
ion within Line for Ea
2 Even, TOG3 to TOG6 Odd.
Generating HBLK Line Alternation
One further feature of the AD9925 is the ability to alternate dif-
ferent HBLK toggle positions on odd and even lines. This may be
used in conjunction with vertical pattern odd/even alternation or
on its own. When a 1 is writte
and TOG2 are used on odd lines, while TOG3 to TOG6 are
used on even lines. Writing a 2 to the HBLKALT register give
the opposite result: TOG1 and TOG2 are used on even lines,
while TOG3 to TOG6 are
Timing Generation section for more information.
lternation of HBLK Toggle Positions.
dd, TOG3 to TOG6 Even.
ch Vertical Sequence 0 to 9.
BLANK
used on odd lines. See the Vertical
n to the HBLKALT register, TOG1
s