AD9925BBCZ Analog Devices Inc, AD9925BBCZ Datasheet - Page 3

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AD9925BBCZ

Manufacturer Part Number
AD9925BBCZ
Description
IC CCD SIGNAL PROCESSOR 96CSPBGA
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9925BBCZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
96-CSPBGA
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
36MSPS
Input Voltage Range
0.8V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-25C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
96
Package Type
CSPBGA
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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SPECIFICATIONS
Table 1.
Parameter
TEMPERATURE RANGE
POWER SUPPLY VOLTAGES
V-DRIVER SUPPLY VOLTAGES
POWER DISSIPATION—AFETG Section Only (see Figure 9 for Power Curves)
POWER DISSIPATION—V-Driver Section Only (VDVDD, VH, VL)
MAXIMUM CLOCK RATE (CLI)
1
2
The total power dissipated by the HVDD supply may be approximated using the equation Total HVDD Power = [C
Reducing the H-loading and/or using a lower HVDD supply will reduce the power dissipation. C
The power dissipated by the V-driver circuitry depends on the logic states of the inputs as well as actual CCD operation; default dc values are used for each measure-
ment, in each mode of operation. Load conditions are described in the
Operating
Storage
AVDD (AFE Analog Supply)
TCVDD (Timing Core Analog Supply)
RGVDD (RG Driver)
HVDD (H1 to H4 Drivers)
DRVDD (Data Output Drivers)
DVDD (Digital)
VDVDD (V-Driver Input Logic Supply)
VH1, VH2 (V-Driver High Supply for 3-Level Outputs)
VM1, VM2 (V-Driver Mid Supply for 3-Level and 2-Level Outputs)
VL1, VL2 (V-Driver Low Supply for 3-Level and 2-Level Outputs)
36 MHz, 3.0 V Supply, 100 pF Load on Each H1 to H4 Output, 20 pF RG Load
Standby 1 Mode
Standby 2 Mode
Standby 3 Mode
Power from HVDD Only
Power from RGVDD Only
Power from AVDD Only
Power from TCVDD Only
Power from DVDD Only
Power from DRVDD Only
Normal Operation (VH = 15.0 V, VL = −7.5 V)
Standby 1 Mode
Standby 2 Mode
Standby 3 Mode
2
2
2
1
2
Vertical Driver Specifications
Rev. A | Page 3 of 96
LOAD
is the total capacitance seen by all H-outputs.
section.
2.7
2.7
36
Min
–25
–65
2.7
2.7
2.7
2.7
2.7
10.5
–1.0
–10.0
LOAD
× HVDD × Pixel Frequency] × HVDD.
Typ
3.0
3.0
3.0
3.0
3.0
3.0
3.0
15.0
0.0
–7.5
370
10
10
1
130
10
105
42
57
26
60
70
70
110
Max
+85
+150
3.6
3.6
3.6
3.6
3.6
3.6
3.6
16.0
+3.0
–6.0
AD9925
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
MHz

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