AD9925BBCZ Analog Devices Inc, AD9925BBCZ Datasheet - Page 65

• Manufacturer Part Number: AD9925BBCZ
• Description: IC CCD SIGNAL PROCESSOR 96CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9925BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 96-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.8V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 96
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Table 44. Register Map Selection
Address
7F
Table 45. AFE Operation Register Detail
Add
00
Table
Add
03
ress
ress
46. A
Data Bit Content
[1:0]
Data Bi
[1:0]
[2]
[3]
[4]
[5]
[7:6]
[8]
[9]
[11:10]
Data Bi
[1:0]
[2]
[3]
[4]
[5]
FE Con
t Content
t Content
trol Registe
r D
Default Value
0
De
3
1
0
0
0
0
0
0
0
De
0
1
0
0
0
fault Value
etail
fault Value
Register Name
BANKSELECT
Name
PWRDOWN
CLPENABLE
CLPSPEED
FASTUPDATE
PBLK_LVL
TEST
DCBYP
TEST
CDSGAIN
Name
TEST
TEST
DOUTDISABLE
DOUTLATCH
GRAYENCODE
Rev. A | Page 65 of 96
Register Description
Register Bank Access for Bank 1, Bank 2, and Bank 3.
0: Bank 1, 1: Bank 2, 2: Bank 3, and 3: Bank 1.
Description
0: Normal Operation, 1: Standby 1, 2: Standby 2, 3: Standby 3.
0: Disable OB Clamp, 1: Enable OB Clamp.
0: Select Normal OB Clamp Settling, 1: Select Fast OB Clamp
Settling.
1: Select Temporary Fast Clamping When VGA Gain Is Up-
dated.
DOUT Value during PBLK: 0: Blank to 0, 1: Blank to Clamp
Level.
Test Operation Only. Set to 0.
0: Enable DC Restore Circuit, 1: Bypass DC Restore Circuit dur-
ing PBLK.
Test Use Only. Set to 0.
0: 0 dB, 1: 2 dB, 2: 4 dB, and 3: 0 dB.
Test Use Only. Set to 0.
Test Use Only. Recommended setting is 0.
0 = Data Outputs Are Driven,
1 = Data Outputs Are Three-Stated.
0 = Latch Data Outputs with DOUT Phase,
1 = Output Latch Transparent.
0 = Binary Encode Data Outputs,
1 = Gray Encode Data Outputs.
Description
AD9925