AD9925BBCZ Analog Devices Inc, AD9925BBCZ Datasheet - Page 76

• Manufacturer Part Number: AD9925BBCZ
• Description: IC CCD SIGNAL PROCESSOR 96CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9925BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 96-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.8V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 96
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9925
Table 58. Vertical Sequence 0 (VSEQ0) Register Map
Address
80
81
82
83
84
85
86
87
Table 59. Vertical Sequence 1
Add
88
89
8A
8B
8C
8D
8E
8F
ress
Data Bit Content
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[12]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
Data B
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[12]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]|
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
it Content
(VSEQ1) Regist r Map
Default Value
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
De
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
fault Value
e
Register Nam
HBLKMASK_0
CLPOBPOL_0
PBLKPOL_0
VPATSEL_0
VMASK_
HBLKALT_
HDLEN13_0
UNUSED
VPATREPO_0
VPATREPE_ 0
VPATSTA
HDLEN_0
PBLKTOG1_0
PBLKTOG2_0
HBLKTOG1_0
HBLKTOG2_0
HBLKTOG3_0
HBLKTOG4_0
HBLKTOG5_0
HBLKTOG6_0
CLPOBTOG1_0
CLPOBTOG2_0
Register Nam
HBLKMASK_
CLPOBPOL
PBLKPOL_1
VPATSEL_1
VMASK_1
HBLKAL
HDLEN13_1
UNUSED
VPATREPO_1
VPATREPE_1
VPATSTART_
HDLEN_1
PBLKTOG1_1
PBLKTOG2_1
HBLKTOG1_1
HBLKTOG2_1
HBLKTOG3_1
HBLKTOG4_1
HBLKTOG5_1
HBLKTOG6_1
CLPOBTOG1_1
CLPOBTOG2_1
T_1
0
Rev. A | Page 76 of 96
RT_0
0
_1
1
1
e
e
Register Descriptio
Masking Polarity during HBLK. H1 [0], H3 [1
CLPOB Start Polarity
PBLK Start Polarity
Selected Vertical Pattern Group for Vertical Sequence 0
Enable Masking of Vertical Outputs (Specified by FREEZE/RESUM
Registers
Enable HBLK Alternation
13
Unused
Number of Selected Vertical Pattern Group Repetitions for Odd Lines.
Number of Selected Vertical Pattern Group Repetitions for Even
Lines.
Start Position in the Line for the Selected Vertical Pattern
HD Line Length (Number of Pixels) for Vertical
PBLK Toggle Position 1 for Vertical Sequence 0
PBLK Toggle Position 2 for Vertical Sequence 0
HBLK Toggle Position 1 for Vertical Sequence
HBLK Toggle Position 2 for Vertical Sequence 0
HBLK Toggle Position 3 for Vertical Sequence
HBLK Toggle Position 4 for Vertical Sequence 0
HBLK Toggle Position 5 for Vertical Sequence 0
HBLK Toggle Position 6 for Vertical Sequence 0.
CLPOB Toggle Position 1 for Vertical Sequence 0
CLPOB Toggle Position 2 for Vertical Sequence 0.
Register Description
Masking Polarity du
CLPOB Start Polar
PBLK Start Polarity.
Selected Vertical Pattern Group for Vertical Sequence 1.
Enable Masking of Verti
Registers).
Enable
13
Unused.
Number of Selected Vertical Pattern Group Repetitions for Odd
Number of Selected Vertical Pattern Group Repetitions for Eve
Start Position in the Line for the Selected Verti
HD Line Length (Number of Pixels) for Vertical
PBLK Toggle Position 1 for Vertical Sequence 1
PBLK Toggle Position 2 for Vertical Sequence 1
HBLK Toggle Position 1 for Vertical Sequence 1
HBLK Toggle Position 2 for Vertical Sequence 1
HBLK Toggle Position 3 for Vertical Sequence 1
HBLK Toggle Position 4 for Vertical Sequence 1.
HBLK Toggle Position 5 for Vertical Sequence 1.
HBLK Toggle Position 6 for Vertical Sequence 1.
CLPOB Toggle Position 1 for Vertical Sequence 1.
CLPOB Toggle Position 2 for Vertical Sequence 1.
th
th
Bit for HD Length Counter Allows HD Length up to 8191 Pixels.
Bit for HD Length Counter Allows HD Length up to 8191 Pixel
HBLK Alternation.
.
).
ity.
.
ring HBLK. H1 [0], H3 [1].
.
n
cal Outputs (Specified by FREEZE/RESUME
.
].
0.
0.
cal Pattern Group.
Sequence 0.
.
.
Sequence 1.
.
.
.
.
.
.
.
.
.
.
Group.
n Lines.
Lines.
E
s.