AD9925BBCZ Analog Devices Inc, AD9925BBCZ Datasheet - Page 22

• Manufacturer Part Number: AD9925BBCZ
• Description: IC CCD SIGNAL PROCESSOR 96CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9925BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 96-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.8V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -25C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 96
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9925
VERTICAL TIMING GENERATION
The AD9925 provides a very flexible solution for generating
vertical CCD timing and can support multiple CCDs and dif-
ferent system architectures. The vertical transfer clocks XV1 to
XV8 are used to shift each line of pixels into the
p
individually programmed into various readout configurations,
u
Figure 30 shows an overview of how the vertical timing is gen-
erated in four steps. First, the individual pulse patterns for XV1
to XV8 are created by using the vertical pattern group registers.
ut register of the CCD. The AD9925 allows these outputs to be
sing a 4-step process.
CLPOB
CCDIN
H1/H3
H2/H4
HBLK
PBLK
SHP
SHD
HD
OPTICAL BLACK
VERTICAL SHIFT
28 DUMMY PIXELS
4 OB PIXELS
V
horizontal out-
DUMMY
Figure 29. Horizontal Sequence Example
HORIZONTAL CCD REGISTER
Figure 28. Example CCD Configuration
EFFECTIVE IMAGE AREA
OB
Rev. A | Page 22 of 96
H
EFFECTIVE PIXELS
Second, the vertical pattern groups are used to build the
sequences, where additional information is added. Third, the
readout for an entire field is constructed by dividing the field
into different regions and then assigning a sequence to ea
region. Each field
accommodate the different steps of the readout, such as high
speed line shifts and unique vertical line transfers. Up to six
different fields may be created. Finally, the MODE register al-
lows the different fields to be combined into any order for vari-
ous readout configurations.
48 OB PIXELS
10 VERTICAL
OB LINES
2 VERTICAL
OB LINES
can contain up to seven different regions to
OPTICAL BLACK
VERT SHIFT
ch