AD9888KSZ-140 Analog Devices Inc, AD9888KSZ-140 Datasheet - Page 15

IC FLAT PANEL INTERFACE 128-MQFP

AD9888KSZ-140

Manufacturer Part Number
AD9888KSZ-140
Description
IC FLAT PANEL INTERFACE 128-MQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9888KSZ-140

Applications
Graphic Cards, VGA Interfaces
Interface
2-Wire Serial
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-MQFP, 128-PQFP
Mounting Type
Surface Mount
Supply Current
200mA
Power Dissipation Pd
850mW
Supply Voltage Range
3V To 3.6V, 2.2V To 3.6V
Digital Ic Case Style
MQFP
No. Of Pins
128
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC
Number Of Elements
3
Resolution
8Bit
Sample Rate
140MSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±0.25/±0.5V
Differential Input
No
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
3.6V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
1.05W
Differential Linearity Error
±1.35LSB
Integral Nonlinearity Error
±2.5LSB
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Package Type
MQFP
Input Signal Type
Single-Ended
Interface Type
2-wire, Serial
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9888KSZ-140
Manufacturer:
AD
Quantity:
217
Part Number:
AD9888KSZ-140
Manufacturer:
ADI
Quantity:
482
Part Number:
AD9888KSZ-140
Manufacturer:
Analog Devices Inc
Quantity:
10 000
REV. B
DATACK
DATACK
ADCCK
HSYNC
DOUTA
DOUTB
HSOUT
DATACK
RGBIN
ADCCK
DOUTA
DOUTB
HSYNC
HSOUT
RGBIN
PXCK
ADCCK
DOUTA
DOUTB
HSYNC
HSOUT
RGBIN
PXCK
PXCK
Figure 18. Dual-Channel Mode, Interleaved Outputs, Two Pixels/Clock (Even Pixels)
HS
HS
HS
P0 P1 P2 P3 P4 P5 P6 P7
P0
P0
P1
P1
7 PIPE DELAY
7 PIPE DELAY
Figure 16. Dual-Channel Mode, Interleaved Outputs
P2
P2
8 PIPE DELAY
Figure 17. Dual-Channel Mode, Parallel Outputs
P3
P3
P4
P4
P5
P5
P6
P6
–15–
P7
P7
D0
D0
VARIABLE DURATION
VARIABLE DURATION
VARIABLE DURATION
D1
D2
D0
D1
D2
D4
D3
D6
D2
D3
D4
D5
D5
D4
AD9888

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