PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 130
PI7C9X130DNDE
Manufacturer Part Number
PI7C9X130DNDE
Description
IC PCIE-PCIX BRIDGE 1PORT 256BGA
Manufacturer
Pericom Semiconductor
Specifications of PI7C9X130DNDE
Applications
PCI-to-PCI Bridge
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
1.8V, 3.3V
Package / Case
256-PBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI7C9X130DNDE
Manufacturer:
Pericom
Quantity:
135
Company:
Part Number:
PI7C9X130DNDE
Manufacturer:
NSC
Quantity:
70
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7.5.118 SECONDARY ERROR CAPABILITY AND CONTROL REGISTER – OFFSET 138h
7.5.119 SECONDARY HEADER LOG REGISTER – OFFSET 13Ch – 148h
7.5.120 RESERVED REGISTER – OFFSET 14Ch
7.5.121 VC CAPABILITY ID REGISTER – OFFSET 150h
7.5.122 VC CAPABILITY VERSION REGISTER – OFFSET 150h
7.5.123 NEXT CAPABILITY OFFSET REGISTER – OFFSET 150h
PERICOM SEMICONDUCTOR - Confidential
Bit
4:0
31:5
Bit
35:0
39:36
43:40
63:44
95:64
127:96
Bit
15:0
Bit
19:16
Bit
31:20
Function
Secondary First
Error Pointer
Reserved
Function
Transaction
Attribute
Transaction
Command Lower
Transaction
Command Upper
Reserved
Transaction Address
Transaction Address
Function
VC Capability ID
Function
VC Capability
Version
Function
Next Capability
Offset
Type
Type
Type
Type
Type
ROW
ROS
ROS
ROS
ROS
ROS
ROS
RO
RO
RO
RO
Page 130 of 165
Description
Reset to 0
Reset to 0
Description
Transaction attribute, CBE [3:0] and AD [31:0] during attribute phase
Reset to 0
Transaction command lower, CBE [3:0] during first address phase
Reset to 0
Transaction command upper, CBE [3:0] during second address phase of DAC
transaction
Reset to 0
Reset to 0
Transaction address, AD [31:0] during first address phase
Reset to 0
Transaction address, AD [31:0] during second address phase of DAC
transaction
Reset to 0
Description
Reset to 0002h
Description
Reset to 1h
Description
Next capability offset – the end of capabilities
Reset to 0
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130
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