PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 60

IC PCIE-PCIX BRIDGE 1PORT 256BGA

PI7C9X130DNDE

Manufacturer Part Number
PI7C9X130DNDE
Description
IC PCIE-PCIX BRIDGE 1PORT 256BGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X130DNDE

Applications
PCI-to-PCI Bridge
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
1.8V, 3.3V
Package / Case
256-PBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C9X130DNDE
Manufacturer:
Pericom
Quantity:
135
Part Number:
PI7C9X130DNDE
Manufacturer:
NSC
Quantity:
70
Part Number:
PI7C9X130DNDE
Manufacturer:
Pericom
Quantity:
10 000
7.4.54 POWER MANAGEMENT CONTROL AND STATUS REGISTER – OFFSET 94h
7.4.55 PCI-TO-PCI BRIDGE SUPPORT EXTENSION REGISTER – OFFSET 94h
PERICOM SEMICONDUCTOR - Confidential
Bit
24:22
25
26
31:27
Bit
1:0
7:2
8
12:9
14:13
15
Bit
21:16
22
Function
AUX Current
D1 Power
Management
D2 Power
Management
PME_L Support
Function
Power State
Reserved
PME Enable
Data Select
Data Scale
PME Status
Function
Reserved
B2/B3 Support
Type
Type
Type
RWCS
RWS
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
Page 60 of 165
Description
000: 0mA
001: 55mA
010: 100mA
011: 160mA
100: 220mA
101: 270mA
110: 320mA
111: 375mA
Reset to 001
D1 power management is not supported
Reset to 0
D2 power management is not supported
Reset to 0
PME_L is supported in D3 cold, D3 hot, and D0 states.
Reset to 11001
Description
Power State is used to determine the current power state of PI7C9X130. If a
non-implemented state is written to this register, PI7C9X130 will ignore the
write data. When present state is D3 and changing to D0 state by
programming this register, the power state change causes a device reset without
activating the RESET_L of PCI/PCI-X bus interface
00: D0 state
01: D1 state not implemented
10: D2 state not implemented
11: D3 state
Reset to 00
Reset to 000000
0: PME_L assertion is disabled
1: PME_L assertion is enabled
Reset to 0
Data register is not implemented
Reset to 0000
Data register is not implemented
Reset to 00
PME_L is supported
Reset to 0
Description
Reset to 000000
0: B2 / B3 not support for D3hot
Reset to 0
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130

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