PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 31

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7 CONFIGURATION REGISTERS
7.1 CONFIGURATION REGISTER MAP
PERICOM SEMICONDUCTOR - Confidential
PI7C9X130 supports Type-0 (non-transparent bridge mode) and Type-1 (transparent bridge mode)
configuration space headers and Capability ID of 01h (PCI power management) to 10h (PCI Express
capability structure).
With pin REVRSB = 0, device-port type (bit [7:4]) of capability register will be set to 7h (PCI Express-
to-PCI/PIC-X bridge). When pin REVRSB = 1, device-port type (bit [7:4]) of capability register will be
set to 8h (PCI/PCI-X-to-PCI Express bridge).
PI7C9X130 supports PCI Express capabilities register structure with capability version set to 1h (bit [3:0]
of offset 02h).
When pin TM0=0, PI7C9X130 will be in transparent bridge mode and the configuration registers for
transparent bridge should be used.
When pin TM0=1, PI7C9X130 will be in non-transparent bridge mode and the configuration registers for
non-transparent bridge should be used.
PI7C9X130 supports capability pointer with PCI-X (ID=07h), PCI power management (ID=01h), PCI
bridge sub-system vendor ID (ID=0Dh), PCI Express (ID=10h), vital product data (ID=03h), and
message signaled interrupt (ID=05h). Hot swap (ID=06h) can be enabled by setting HSEN=1. Slot
identification (ID=04h) is off by default and can be turned on through configuration programming.
Figure 7-10 Configuration Register Map (00h – FFh)
Primary Bus
Configuration
Access for both
Transparent and
Non-transparent
mode or
Secondary Bus
Configuration
Access for
Transparent
Mode
01h - 00h
03h – 02h
05h – 04h
07h – 06h
0Bh – 08h
0Ch
0Dh
Secondary
Bus
Configuration
Access for
Non-
Transparent
Mode only
01h – 00h
03h – 02h
45h – 44h
47h – 46h
0Bh – 08h
4Ch
4Dh
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Transparent
Mode (type1)
Vendor ID
Device ID
Command
Register
Primary Status
Register
Class Code and
Revision ID
Cacheline Size
Register
Primary
Latency Timer
Non-
Transparent
Mode
(Type0)
Vendor ID
Device ID
Primary
Command
Register
Primary Status
Register
Class Code and
Revision ID
Primary
Cacheline Size
Register
Primary
Latency Timer
PCI EXPRESS TO PCI-X BRIDGE
(I2C) Access
EEPROM
Yes
Yes
Yes
No
No
No
Mar 2010 - Rev 2.0
-
1
1
1
SM Bus
Access
Yes
Yes
Yes
Yes
Yes
Yes
-
PI7C9X130
5
5
5