PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 188
PEF82912FV1.4
Manufacturer Part Number
PEF82912FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PEF82912FV1.4.pdf
(240 pages)
Specifications of PEF82912FV1.4
Mounting Style
SMD/SMT
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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Part Number:
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4.9.10
MCDA
Value after reset: FF
MCDAxy Monitoring CDAxy Bits
4.9.11
STI
Value after reset: 00
For all interrupts in the STI register the following logical states are applied
STOVxy
Data Sheet
STOV21 STOV20 STOV11 STOV10
Bit7
7
7
MCDA21
MCDA - Monitoring CDA Bits
STI - Synchronous Transfer Interrupt
0 =
1 =
Bit 7 and Bit 6 of the CDAxy registers are mapped into the MCDA register.
This can be used for monitoring the D-channel bits on DU and DD and the
“Echo bits” on the TIC bus with the same register.
0 =
1 =
Synchronous Transfer Overflow Interrupt
Bit6
The IOM interface is enabled
The IOM interface is disabled (FSC, DCL, clock outputs have high
impedance; DU, DD data line inputs are switched off and outputs
are high impedant)
Interrupt has not occurred
Interrupt has occurred
H
H
Bit7
MCDA20
Bit6
read
read
174
STI21
Bit7
MCDA11
STI20
Bit6
Register Description
PEF 82912/82913
STI11
Address:
Address:
Bit7
MCDA10
2001-03-30
STI10
Bit6
0
0
57
58
H
H
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