PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 66

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PEF82912FV1.4

Manufacturer Part Number
PEF82912FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF82912FV1.4

Mounting Style
SMD/SMT
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details

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2.3.5
The upstream D-channel is arbitrated between the S-bus and external HDLC controllers
via the TIC bus (S/G, BAC, TBA bits) according to the IOM -2 Reference Guide
Further to the implementation in the INTC-Q it is possible, to set the priority (8 or 10) of
all HDLC-controllers connected to IOM -2, which is particularly useful for use of the Q-
SMINT I together with the UTAH.
2.3.5.1
Figure 26
between the S-bus and the microcontroller.
Figure 26
1)
Data Sheet
The A/B-bit is not supported by the U-transceiver
D
E-Bit
and
D-Channel Access Control
Application Examples for D-Channel Access Control
D-Channel Arbitration: C with HDLC and Direct Access to TIC Bus
Figure 27
Q-SMINT I
S
Arbitr.
IOM-2 i/f
show different scenarios for the local D-channel arbitration
Prio
IOM-2
S/G
BAC
BAC
S/G
HDLC
µP - i/f
HDLC
e.g. UTAH;
HDLC
MPC860
HDLC
52
µC
U
•µC has access to BAC-Bit
and S/G-bit on IOM-2.
•Access to TBA generally not
required if only one local D-channel
source.
Functional Description
PEF 82912/82913
D
2001-03-30
1)
.

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