PEF82912FV1.4 Infineon Technologies, PEF82912FV1.4 Datasheet - Page 34
PEF82912FV1.4
Manufacturer Part Number
PEF82912FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PEF82912FV1.4.pdf
(240 pages)
Specifications of PEF82912FV1.4
Mounting Style
SMD/SMT
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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Company:
Part Number:
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Manufacturer:
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2.1.1.1
The basic structure of a read/write access to the Q-SMINT I registers via the serial
control interface is shown in
•
Figure 7
A new programming sequence starts with the transfer of a header byte. The header byte
specifies different programming sequences allowing a flexible and optimized access to
the individual functional blocks of the Q-SMINT I.
The possible sequences are listed in
•
Table 5
Data Sheet
Header
Byte
write sequence:
read sequence:
40
48
43
41
49
H
H
H
H
H
SDR
SDR
SDX
Adr-Data-Adr-Data
Adr-Data-Data-Data
Programming Sequences
Serial Command Structure
Header Byte Code
7
7
Sequence
header
header
Figure
non-interleaved
interleaved
Read-/Write-only
non-interleaved
interleaved
0 7 6
0 7 6
write
read
7.
0
1
Sequence Type
Table 5
address (command)
address (command)
20
byte 2
byte 2
and are described after that.
0 7
0 7
Address Range 00
Address Range 00
Functional Description
write data
read data
byte 3
byte 3
PEF 82912/82913
Access to
0
0
2001-03-30
H
H
-7F
-7F
H
H
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