S5920Q Applied Micro Circuits Corporation, S5920Q Datasheet - Page 105

S5920Q

Manufacturer Part Number
S5920Q
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of S5920Q

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
PQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S5920Q
Manufacturer:
AMCC
Quantity:
5 510
Part Number:
S5920Q
Manufacturer:
AMCC
Quantity:
1 518
S5920 – PCI Product: PCI Bus Protocol
Figure 47. Burst PCI Bus Write of S5920 Registers
Target-Initiated Termination
There are situations where the target may end a trans-
fer prematurely. This is called “target-initiated
termination.” Target termination falls into three catego-
ries: disconnect, retry, and target abort. Only the
disconnect termination completes a data transfer.
Target Disconnects
There are many situations where a target may discon-
nect. Slow responding targets may disconnect to
permit more efficient (faster) devices to be accessed
while they prepare for the next data phase. Or a target
may disconnect if it recognizes that the next data
phase in a burst transfer is out of its address range. A
target disconnects by asserting STOP#, TRDY#, and
DEVSEL# as shown in Figures 4a and 4b. The initiator
in Figure 4a responds to the disconnect condition by
deasserting FRAME# on the following clock but does
not complete the data transfer until IRDY# is asserted.
The timing diagram in Figure 4b also applies to the
S5920.
The S5920 performs a target disconnect if a burst
access is attempted to any of its PCI Operation/Con-
figuration Registers, or to the Expansion ROM.
Target Requested Retries
The S5920 initiates a retry for Pass-Thru writes when
the Write FIFO is full, and for Pass-Thru reads when
the Add-On cannot supply data within 16 PCI clocks
from the assertion of FRAME# (for the first data phase
of a burst). A retry is requested by a target by assert-
105
C/BE[3:0]#
AD[31:0]
TRDY#
IRDY#
DEVSEL#
STOP#
PCLK
FRAME#
(T) Driven by Target
(I) Driven by Initiator
DS1596
(T)
(T)
(T)
(I)
(I)
(I)
(I)
1
Address
Cmd
Bus
2
Data 1
BE 1
Transfered
Data
3
4
Transfered
Data 2
No Data
BE 2
5
ing both STOP# and DEVSEL# while TRDY# is
deasserted. Figure 5 shows the behavior of the S5920
when performing a target-initiated retry.
Figure 48. Figure 4a. Target Disconnect Example 1
Figure 49. Figure 4b. Target Disconnect Example 2
Target Aborts
A target abort termination represents an error condi-
tion when no number of retries will produce a
successful target access. A target abort is uniquely
identified by the target deasserting DEVSEL# and
TRDY# while STOP# is asserted. When a target per-
forms an abort, it must also set bit 11 of its PCI Status
register (PCISTS). The S5920 never responds with a
target abort when accessed. Target termination types
are summarized in Table 2.
DEVSEL#
ST OP#
PCLK
FRAME#
IRDY#
TRDY#
PCLK
FRAME#
TRDY#
DEVSEL#
STOP#
IRDY#
Transfered
Data
(T)
(T)
(T)
(I)
(I)
(T)
(T)
(T)
(I)
(I)
Identified
1
Target
Disconnect
1
Target
Disconnect
Single
Transferred
Revision 1.02 – April 12, 2007
2
AMCC Confidential and Proprietary
2
Data
Transfered
Data
3
3
Data Book
(I) Driven by Initiator
(T) Driven by Target
4
4
(I) Driven by Initiato
(T) Driven by Targe
5
5

Related parts for S5920Q